1fe8b45aaSThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2fe8b45aaSThierry Reding%YAML 1.2 3fe8b45aaSThierry Reding--- 4fe8b45aaSThierry Reding$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml# 5fe8b45aaSThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6fe8b45aaSThierry Reding 7fe8b45aaSThierry Redingtitle: NVIDIA Tegra MIPI pad calibration controller 8fe8b45aaSThierry Reding 9fe8b45aaSThierry Redingmaintainers: 10fe8b45aaSThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11fe8b45aaSThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12fe8b45aaSThierry Reding 13fe8b45aaSThierry Redingproperties: 14fe8b45aaSThierry Reding $nodename: 15fe8b45aaSThierry Reding pattern: "^mipi@[0-9a-f]+$" 16fe8b45aaSThierry Reding 17fe8b45aaSThierry Reding compatible: 18fe8b45aaSThierry Reding enum: 19fe8b45aaSThierry Reding - nvidia,tegra114-mipi 20fe8b45aaSThierry Reding - nvidia,tegra210-mipi 21fe8b45aaSThierry Reding - nvidia,tegra186-mipi 22fe8b45aaSThierry Reding 23fe8b45aaSThierry Reding reg: 24fe8b45aaSThierry Reding maxItems: 1 25fe8b45aaSThierry Reding 26fe8b45aaSThierry Reding clocks: 27fe8b45aaSThierry Reding items: 28fe8b45aaSThierry Reding - description: module clock 29fe8b45aaSThierry Reding 30fe8b45aaSThierry Reding clock-names: 31fe8b45aaSThierry Reding items: 32fe8b45aaSThierry Reding - const: mipi-cal 33fe8b45aaSThierry Reding 34fe8b45aaSThierry Reding power-domains: 35fe8b45aaSThierry Reding maxItems: 1 36fe8b45aaSThierry Reding 37fe8b45aaSThierry Reding "#nvidia,mipi-calibrate-cells": 38fe8b45aaSThierry Reding description: The number of cells in a MIPI calibration specifier. 39fe8b45aaSThierry Reding Should be 1. The single cell specifies a bitmask of the pads that 40fe8b45aaSThierry Reding need to be calibrated for a given device. 41*4334aec0SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 42fe8b45aaSThierry Reding const: 1 43fe8b45aaSThierry Reding 44fe8b45aaSThierry RedingadditionalProperties: false 45fe8b45aaSThierry Reding 46fe8b45aaSThierry Redingrequired: 47fe8b45aaSThierry Reding - compatible 48fe8b45aaSThierry Reding - reg 49fe8b45aaSThierry Reding - clocks 50fe8b45aaSThierry Reding - "#nvidia,mipi-calibrate-cells" 51fe8b45aaSThierry Reding 52fe8b45aaSThierry Redingexamples: 53fe8b45aaSThierry Reding - | 54fe8b45aaSThierry Reding #include <dt-bindings/clock/tegra114-car.h> 55fe8b45aaSThierry Reding 56fe8b45aaSThierry Reding mipi@700e3000 { 57fe8b45aaSThierry Reding compatible = "nvidia,tegra114-mipi"; 58fe8b45aaSThierry Reding reg = <0x700e3000 0x100>; 59fe8b45aaSThierry Reding clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>; 60fe8b45aaSThierry Reding clock-names = "mipi-cal"; 61fe8b45aaSThierry Reding #nvidia,mipi-calibrate-cells = <1>; 62fe8b45aaSThierry Reding }; 63fe8b45aaSThierry Reding 64fe8b45aaSThierry Reding dsia: dsi@54300000 { 65fe8b45aaSThierry Reding compatible = "nvidia,tegra114-dsi"; 66fe8b45aaSThierry Reding reg = <0x54300000 0x00040000>; 67fe8b45aaSThierry Reding clocks = <&tegra_car TEGRA114_CLK_DSIA>, 68fe8b45aaSThierry Reding <&tegra_car TEGRA114_CLK_DSIALP>, 69fe8b45aaSThierry Reding <&tegra_car TEGRA114_CLK_PLL_D_OUT0>; 70fe8b45aaSThierry Reding clock-names = "dsi", "lp", "parent"; 71fe8b45aaSThierry Reding resets = <&tegra_car 48>; 72fe8b45aaSThierry Reding reset-names = "dsi"; 73fe8b45aaSThierry Reding nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */ 74fe8b45aaSThierry Reding }; 75