1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: STMicroelectronics STM32 DSI host controller 8 9maintainers: 10 - Philippe Cornu <philippe.cornu@foss.st.com> 11 - Yannick Fertre <yannick.fertre@foss.st.com> 12 13description: 14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 15 16allOf: 17 - $ref: dsi-controller.yaml# 18 19properties: 20 compatible: 21 const: st,stm32-dsi 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 items: 28 - description: Module Clock 29 - description: DSI bus clock 30 - description: Pixel clock 31 minItems: 2 32 33 clock-names: 34 items: 35 - const: pclk 36 - const: ref 37 - const: px_clk 38 minItems: 2 39 40 resets: 41 maxItems: 1 42 43 reset-names: 44 items: 45 - const: apb 46 47 phy-dsi-supply: 48 description: 49 Phandle of the regulator that provides the supply voltage. 50 51 ports: 52 $ref: /schemas/graph.yaml#/properties/ports 53 54 properties: 55 port@0: 56 $ref: /schemas/graph.yaml#/properties/port 57 description: 58 DSI input port node, connected to the ltdc rgb output port. 59 60 port@1: 61 $ref: /schemas/graph.yaml#/$defs/port-base 62 unevaluatedProperties: false 63 description: | 64 DSI output port node, connected to a panel or a bridge input port. 65 properties: 66 endpoint: 67 $ref: /schemas/media/video-interfaces.yaml# 68 unevaluatedProperties: false 69 properties: 70 data-lanes: 71 minItems: 1 72 items: 73 - const: 1 74 - const: 2 75 76required: 77 - compatible 78 - reg 79 - clocks 80 - clock-names 81 - ports 82 83unevaluatedProperties: false 84 85examples: 86 - | 87 #include <dt-bindings/interrupt-controller/arm-gic.h> 88 #include <dt-bindings/clock/stm32mp1-clks.h> 89 #include <dt-bindings/reset/stm32mp1-resets.h> 90 #include <dt-bindings/gpio/gpio.h> 91 dsi: dsi@5a000000 { 92 compatible = "st,stm32-dsi"; 93 reg = <0x5a000000 0x800>; 94 clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; 95 clock-names = "pclk", "ref", "px_clk"; 96 resets = <&rcc DSI_R>; 97 reset-names = "apb"; 98 phy-dsi-supply = <®18>; 99 100 #address-cells = <1>; 101 #size-cells = <0>; 102 103 ports { 104 #address-cells = <1>; 105 #size-cells = <0>; 106 107 port@0 { 108 reg = <0>; 109 dsi_in: endpoint { 110 remote-endpoint = <<dc_ep1_out>; 111 }; 112 }; 113 114 port@1 { 115 reg = <1>; 116 dsi_out: endpoint { 117 remote-endpoint = <&panel_in>; 118 }; 119 }; 120 }; 121 122 panel@0 { 123 compatible = "orisetech,otm8009a"; 124 reg = <0>; 125 reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; 126 power-supply = <&v3v3>; 127 128 port { 129 panel_in: endpoint { 130 remote-endpoint = <&dsi_out>; 131 }; 132 }; 133 }; 134 }; 135 136... 137