13130c26aSBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 23130c26aSBenjamin Gaignard%YAML 1.2 33130c26aSBenjamin Gaignard--- 43130c26aSBenjamin Gaignard$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 53130c26aSBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 63130c26aSBenjamin Gaignard 73130c26aSBenjamin Gaignardtitle: STMicroelectronics STM32 DSI host controller 83130c26aSBenjamin Gaignard 93130c26aSBenjamin Gaignardmaintainers: 10*f4eedebdSPatrice Chotard - Philippe Cornu <philippe.cornu@foss.st.com> 11*f4eedebdSPatrice Chotard - Yannick Fertre <yannick.fertre@foss.st.com> 123130c26aSBenjamin Gaignard 133130c26aSBenjamin Gaignarddescription: 143130c26aSBenjamin Gaignard The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 153130c26aSBenjamin Gaignard 1624d59795SRob HerringallOf: 1724d59795SRob Herring - $ref: dsi-controller.yaml# 1824d59795SRob Herring 193130c26aSBenjamin Gaignardproperties: 203130c26aSBenjamin Gaignard compatible: 213130c26aSBenjamin Gaignard const: st,stm32-dsi 223130c26aSBenjamin Gaignard 233130c26aSBenjamin Gaignard reg: 243130c26aSBenjamin Gaignard maxItems: 1 253130c26aSBenjamin Gaignard 263130c26aSBenjamin Gaignard clocks: 273130c26aSBenjamin Gaignard items: 283130c26aSBenjamin Gaignard - description: Module Clock 293130c26aSBenjamin Gaignard - description: DSI bus clock 303130c26aSBenjamin Gaignard - description: Pixel clock 313130c26aSBenjamin Gaignard minItems: 2 323130c26aSBenjamin Gaignard 333130c26aSBenjamin Gaignard clock-names: 343130c26aSBenjamin Gaignard items: 353130c26aSBenjamin Gaignard - const: pclk 363130c26aSBenjamin Gaignard - const: ref 373130c26aSBenjamin Gaignard - const: px_clk 383130c26aSBenjamin Gaignard minItems: 2 393130c26aSBenjamin Gaignard 403130c26aSBenjamin Gaignard resets: 413130c26aSBenjamin Gaignard maxItems: 1 423130c26aSBenjamin Gaignard 433130c26aSBenjamin Gaignard reset-names: 443130c26aSBenjamin Gaignard items: 453130c26aSBenjamin Gaignard - const: apb 463130c26aSBenjamin Gaignard 473130c26aSBenjamin Gaignard phy-dsi-supply: 483130c26aSBenjamin Gaignard description: 493130c26aSBenjamin Gaignard Phandle of the regulator that provides the supply voltage. 503130c26aSBenjamin Gaignard 513130c26aSBenjamin Gaignard ports: 52b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/ports 53b6755423SRob Herring 543130c26aSBenjamin Gaignard properties: 553130c26aSBenjamin Gaignard port@0: 56b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 573130c26aSBenjamin Gaignard description: 583130c26aSBenjamin Gaignard DSI input port node, connected to the ltdc rgb output port. 593130c26aSBenjamin Gaignard 603130c26aSBenjamin Gaignard port@1: 61b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 623130c26aSBenjamin Gaignard description: 633130c26aSBenjamin Gaignard DSI output port node, connected to a panel or a bridge input port" 643130c26aSBenjamin Gaignard 653130c26aSBenjamin Gaignardrequired: 663130c26aSBenjamin Gaignard - "#address-cells" 673130c26aSBenjamin Gaignard - "#size-cells" 683130c26aSBenjamin Gaignard - compatible 693130c26aSBenjamin Gaignard - reg 703130c26aSBenjamin Gaignard - clocks 713130c26aSBenjamin Gaignard - clock-names 723130c26aSBenjamin Gaignard - ports 733130c26aSBenjamin Gaignard 7424d59795SRob HerringunevaluatedProperties: false 753130c26aSBenjamin Gaignard 763130c26aSBenjamin Gaignardexamples: 773130c26aSBenjamin Gaignard - | 783130c26aSBenjamin Gaignard #include <dt-bindings/interrupt-controller/arm-gic.h> 793130c26aSBenjamin Gaignard #include <dt-bindings/clock/stm32mp1-clks.h> 803130c26aSBenjamin Gaignard #include <dt-bindings/reset/stm32mp1-resets.h> 813130c26aSBenjamin Gaignard #include <dt-bindings/gpio/gpio.h> 823130c26aSBenjamin Gaignard dsi: dsi@5a000000 { 833130c26aSBenjamin Gaignard compatible = "st,stm32-dsi"; 843130c26aSBenjamin Gaignard reg = <0x5a000000 0x800>; 853130c26aSBenjamin Gaignard clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>; 863130c26aSBenjamin Gaignard clock-names = "pclk", "ref", "px_clk"; 873130c26aSBenjamin Gaignard resets = <&rcc DSI_R>; 883130c26aSBenjamin Gaignard reset-names = "apb"; 893130c26aSBenjamin Gaignard phy-dsi-supply = <®18>; 903130c26aSBenjamin Gaignard 913130c26aSBenjamin Gaignard #address-cells = <1>; 923130c26aSBenjamin Gaignard #size-cells = <0>; 933130c26aSBenjamin Gaignard 943130c26aSBenjamin Gaignard ports { 953130c26aSBenjamin Gaignard #address-cells = <1>; 963130c26aSBenjamin Gaignard #size-cells = <0>; 973130c26aSBenjamin Gaignard 983130c26aSBenjamin Gaignard port@0 { 993130c26aSBenjamin Gaignard reg = <0>; 1003130c26aSBenjamin Gaignard dsi_in: endpoint { 1013130c26aSBenjamin Gaignard remote-endpoint = <<dc_ep1_out>; 1023130c26aSBenjamin Gaignard }; 1033130c26aSBenjamin Gaignard }; 1043130c26aSBenjamin Gaignard 1053130c26aSBenjamin Gaignard port@1 { 1063130c26aSBenjamin Gaignard reg = <1>; 1073130c26aSBenjamin Gaignard dsi_out: endpoint { 1083130c26aSBenjamin Gaignard remote-endpoint = <&panel_in>; 1093130c26aSBenjamin Gaignard }; 1103130c26aSBenjamin Gaignard }; 1113130c26aSBenjamin Gaignard }; 1123130c26aSBenjamin Gaignard 1133130c26aSBenjamin Gaignard panel-dsi@0 { 1143130c26aSBenjamin Gaignard compatible = "orisetech,otm8009a"; 1153130c26aSBenjamin Gaignard reg = <0>; 1163130c26aSBenjamin Gaignard reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>; 1173130c26aSBenjamin Gaignard power-supply = <&v3v3>; 1183130c26aSBenjamin Gaignard 1193130c26aSBenjamin Gaignard port { 1203130c26aSBenjamin Gaignard panel_in: endpoint { 1213130c26aSBenjamin Gaignard remote-endpoint = <&dsi_out>; 1223130c26aSBenjamin Gaignard }; 1233130c26aSBenjamin Gaignard }; 1243130c26aSBenjamin Gaignard }; 1253130c26aSBenjamin Gaignard }; 1263130c26aSBenjamin Gaignard 1273130c26aSBenjamin Gaignard... 1283130c26aSBenjamin Gaignard 129