13130c26aSBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
23130c26aSBenjamin Gaignard%YAML 1.2
33130c26aSBenjamin Gaignard---
43130c26aSBenjamin Gaignard$id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
53130c26aSBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml#
63130c26aSBenjamin Gaignard
73130c26aSBenjamin Gaignardtitle: STMicroelectronics STM32 DSI host controller
83130c26aSBenjamin Gaignard
93130c26aSBenjamin Gaignardmaintainers:
103130c26aSBenjamin Gaignard  - Philippe Cornu <philippe.cornu@st.com>
113130c26aSBenjamin Gaignard  - Yannick Fertre <yannick.fertre@st.com>
123130c26aSBenjamin Gaignard
133130c26aSBenjamin Gaignarddescription:
143130c26aSBenjamin Gaignard  The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
153130c26aSBenjamin Gaignard
163130c26aSBenjamin Gaignardproperties:
173130c26aSBenjamin Gaignard  compatible:
183130c26aSBenjamin Gaignard    const: st,stm32-dsi
193130c26aSBenjamin Gaignard
203130c26aSBenjamin Gaignard  reg:
213130c26aSBenjamin Gaignard    maxItems: 1
223130c26aSBenjamin Gaignard
233130c26aSBenjamin Gaignard  clocks:
243130c26aSBenjamin Gaignard    items:
253130c26aSBenjamin Gaignard      - description: Module Clock
263130c26aSBenjamin Gaignard      - description: DSI bus clock
273130c26aSBenjamin Gaignard      - description: Pixel clock
283130c26aSBenjamin Gaignard    minItems: 2
293130c26aSBenjamin Gaignard    maxItems: 3
303130c26aSBenjamin Gaignard
313130c26aSBenjamin Gaignard  clock-names:
323130c26aSBenjamin Gaignard    items:
333130c26aSBenjamin Gaignard      - const: pclk
343130c26aSBenjamin Gaignard      - const: ref
353130c26aSBenjamin Gaignard      - const: px_clk
363130c26aSBenjamin Gaignard    minItems: 2
373130c26aSBenjamin Gaignard    maxItems: 3
383130c26aSBenjamin Gaignard
393130c26aSBenjamin Gaignard  resets:
403130c26aSBenjamin Gaignard    maxItems: 1
413130c26aSBenjamin Gaignard
423130c26aSBenjamin Gaignard  reset-names:
433130c26aSBenjamin Gaignard    items:
443130c26aSBenjamin Gaignard      - const: apb
453130c26aSBenjamin Gaignard
463130c26aSBenjamin Gaignard  phy-dsi-supply:
473130c26aSBenjamin Gaignard    description:
483130c26aSBenjamin Gaignard        Phandle of the regulator that provides the supply voltage.
493130c26aSBenjamin Gaignard
503130c26aSBenjamin Gaignard  ports:
513130c26aSBenjamin Gaignard    type: object
523130c26aSBenjamin Gaignard    description:
533130c26aSBenjamin Gaignard      A node containing DSI input & output port nodes with endpoint
543130c26aSBenjamin Gaignard      definitions as documented in
553130c26aSBenjamin Gaignard      Documentation/devicetree/bindings/media/video-interfaces.txt
563130c26aSBenjamin Gaignard      Documentation/devicetree/bindings/graph.txt
573130c26aSBenjamin Gaignard    properties:
583130c26aSBenjamin Gaignard      port@0:
593130c26aSBenjamin Gaignard        type: object
603130c26aSBenjamin Gaignard        description:
613130c26aSBenjamin Gaignard          DSI input port node, connected to the ltdc rgb output port.
623130c26aSBenjamin Gaignard
633130c26aSBenjamin Gaignard      port@1:
643130c26aSBenjamin Gaignard        type: object
653130c26aSBenjamin Gaignard        description:
663130c26aSBenjamin Gaignard          DSI output port node, connected to a panel or a bridge input port"
673130c26aSBenjamin Gaignard
683130c26aSBenjamin GaignardpatternProperties:
693130c26aSBenjamin Gaignard  "^(panel|panel-dsi)@[0-9]$":
703130c26aSBenjamin Gaignard    type: object
713130c26aSBenjamin Gaignard    description:
723130c26aSBenjamin Gaignard      A node containing the panel or bridge description as documented in
733130c26aSBenjamin Gaignard      Documentation/devicetree/bindings/display/mipi-dsi-bus.txt
743130c26aSBenjamin Gaignard    properties:
753130c26aSBenjamin Gaignard      port:
763130c26aSBenjamin Gaignard        type: object
773130c26aSBenjamin Gaignard        description:
783130c26aSBenjamin Gaignard          Panel or bridge port node, connected to the DSI output port (port@1)
793130c26aSBenjamin Gaignard
803130c26aSBenjamin Gaignard  "#address-cells":
813130c26aSBenjamin Gaignard    const: 1
823130c26aSBenjamin Gaignard
833130c26aSBenjamin Gaignard  "#size-cells":
843130c26aSBenjamin Gaignard    const: 0
853130c26aSBenjamin Gaignard
863130c26aSBenjamin Gaignardrequired:
873130c26aSBenjamin Gaignard  - "#address-cells"
883130c26aSBenjamin Gaignard  - "#size-cells"
893130c26aSBenjamin Gaignard  - compatible
903130c26aSBenjamin Gaignard  - reg
913130c26aSBenjamin Gaignard  - clocks
923130c26aSBenjamin Gaignard  - clock-names
933130c26aSBenjamin Gaignard  - ports
943130c26aSBenjamin Gaignard
953130c26aSBenjamin GaignardadditionalProperties: false
963130c26aSBenjamin Gaignard
973130c26aSBenjamin Gaignardexamples:
983130c26aSBenjamin Gaignard  - |
993130c26aSBenjamin Gaignard    #include <dt-bindings/interrupt-controller/arm-gic.h>
1003130c26aSBenjamin Gaignard    #include <dt-bindings/clock/stm32mp1-clks.h>
1013130c26aSBenjamin Gaignard    #include <dt-bindings/reset/stm32mp1-resets.h>
1023130c26aSBenjamin Gaignard    #include <dt-bindings/gpio/gpio.h>
1033130c26aSBenjamin Gaignard    dsi: dsi@5a000000 {
1043130c26aSBenjamin Gaignard        compatible = "st,stm32-dsi";
1053130c26aSBenjamin Gaignard        reg = <0x5a000000 0x800>;
1063130c26aSBenjamin Gaignard        clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
1073130c26aSBenjamin Gaignard        clock-names = "pclk", "ref", "px_clk";
1083130c26aSBenjamin Gaignard        resets = <&rcc DSI_R>;
1093130c26aSBenjamin Gaignard        reset-names = "apb";
1103130c26aSBenjamin Gaignard        phy-dsi-supply = <&reg18>;
1113130c26aSBenjamin Gaignard
1123130c26aSBenjamin Gaignard        #address-cells = <1>;
1133130c26aSBenjamin Gaignard        #size-cells = <0>;
1143130c26aSBenjamin Gaignard
1153130c26aSBenjamin Gaignard        ports {
1163130c26aSBenjamin Gaignard              #address-cells = <1>;
1173130c26aSBenjamin Gaignard              #size-cells = <0>;
1183130c26aSBenjamin Gaignard
1193130c26aSBenjamin Gaignard              port@0 {
1203130c26aSBenjamin Gaignard                    reg = <0>;
1213130c26aSBenjamin Gaignard                    dsi_in: endpoint {
1223130c26aSBenjamin Gaignard                        remote-endpoint = <&ltdc_ep1_out>;
1233130c26aSBenjamin Gaignard                    };
1243130c26aSBenjamin Gaignard              };
1253130c26aSBenjamin Gaignard
1263130c26aSBenjamin Gaignard              port@1 {
1273130c26aSBenjamin Gaignard                    reg = <1>;
1283130c26aSBenjamin Gaignard                    dsi_out: endpoint {
1293130c26aSBenjamin Gaignard                        remote-endpoint = <&panel_in>;
1303130c26aSBenjamin Gaignard                    };
1313130c26aSBenjamin Gaignard              };
1323130c26aSBenjamin Gaignard        };
1333130c26aSBenjamin Gaignard
1343130c26aSBenjamin Gaignard        panel-dsi@0 {
1353130c26aSBenjamin Gaignard              compatible = "orisetech,otm8009a";
1363130c26aSBenjamin Gaignard              reg = <0>;
1373130c26aSBenjamin Gaignard              reset-gpios = <&gpioe 4 GPIO_ACTIVE_LOW>;
1383130c26aSBenjamin Gaignard              power-supply = <&v3v3>;
1393130c26aSBenjamin Gaignard
1403130c26aSBenjamin Gaignard              port {
1413130c26aSBenjamin Gaignard                    panel_in: endpoint {
1423130c26aSBenjamin Gaignard                        remote-endpoint = <&dsi_out>;
1433130c26aSBenjamin Gaignard                    };
1443130c26aSBenjamin Gaignard              };
1453130c26aSBenjamin Gaignard        };
1463130c26aSBenjamin Gaignard    };
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