1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip rk3066 HDMI controller
8
9maintainers:
10  - Sandy Huang <hjc@rock-chips.com>
11  - Heiko Stuebner <heiko@sntech.de>
12
13properties:
14  compatible:
15    const: rockchip,rk3066-hdmi
16
17  reg:
18    maxItems: 1
19
20  interrupts:
21    maxItems: 1
22
23  clocks:
24    maxItems: 1
25
26  clock-names:
27    const: hclk
28
29  pinctrl-0:
30    maxItems: 2
31
32  pinctrl-names:
33    const: default
34    description:
35      Switch the iomux for the HPD/I2C pins to HDMI function.
36
37  power-domains:
38    maxItems: 1
39
40  rockchip,grf:
41    $ref: /schemas/types.yaml#/definitions/phandle
42    description:
43      This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
44
45  ports:
46    $ref: /schemas/graph.yaml#/properties/ports
47
48    properties:
49      port@0:
50        $ref: /schemas/graph.yaml#/properties/port
51        description:
52          Port node with two endpoints, numbered 0 and 1,
53          connected respectively to vop0 and vop1.
54
55      port@1:
56        $ref: /schemas/graph.yaml#/properties/port
57        description:
58          Port node with one endpoint connected to a hdmi-connector node.
59
60    required:
61      - port@0
62      - port@1
63
64required:
65  - compatible
66  - reg
67  - interrupts
68  - clocks
69  - clock-names
70  - pinctrl-0
71  - pinctrl-names
72  - power-domains
73  - rockchip,grf
74  - ports
75
76additionalProperties: false
77
78examples:
79  - |
80    #include <dt-bindings/clock/rk3066a-cru.h>
81    #include <dt-bindings/interrupt-controller/arm-gic.h>
82    #include <dt-bindings/pinctrl/rockchip.h>
83    #include <dt-bindings/power/rk3066-power.h>
84    hdmi: hdmi@10116000 {
85      compatible = "rockchip,rk3066-hdmi";
86      reg = <0x10116000 0x2000>;
87      interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
88      clocks = <&cru HCLK_HDMI>;
89      clock-names = "hclk";
90      pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
91      pinctrl-names = "default";
92      power-domains = <&power RK3066_PD_VIO>;
93      rockchip,grf = <&grf>;
94
95      ports {
96        #address-cells = <1>;
97        #size-cells = <0>;
98        hdmi_in: port@0 {
99          reg = <0>;
100          #address-cells = <1>;
101          #size-cells = <0>;
102          hdmi_in_vop0: endpoint@0 {
103            reg = <0>;
104            remote-endpoint = <&vop0_out_hdmi>;
105          };
106          hdmi_in_vop1: endpoint@1 {
107            reg = <1>;
108            remote-endpoint = <&vop1_out_hdmi>;
109          };
110        };
111        hdmi_out: port@1 {
112          reg = <1>;
113          hdmi_out_con: endpoint {
114            remote-endpoint = <&hdmi_con_in>;
115          };
116        };
117      };
118    };
119
120    pinctrl {
121      hdmi {
122        hdmi_hpd: hdmi-hpd {
123          rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
124        };
125        hdmii2c_xfer: hdmii2c-xfer {
126          rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
127                          <0 RK_PA2 1 &pcfg_pull_none>;
128        };
129      };
130    };
131