1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: panel timing bindings
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Sam Ravnborg <sam@ravnborg.org>
12
13description: |
14  There are different ways of describing the timing data of a panel. The
15  devicetree representation corresponds to the one commonly found in datasheets
16  for panels.
17
18  The parameters are defined as seen in the following illustration.
19
20  +----------+-------------------------------------+----------+-------+
21  |          |        ^                            |          |       |
22  |          |        |vback_porch                 |          |       |
23  |          |        v                            |          |       |
24  +----------#######################################----------+-------+
25  |          #        ^                            #          |       |
26  |          #        |                            #          |       |
27  |  hback   #        |                            #  hfront  | hsync |
28  |   porch  #        |       hactive              #  porch   |  len  |
29  |<-------->#<-------+--------------------------->#<-------->|<----->|
30  |          #        |                            #          |       |
31  |          #        |vactive                     #          |       |
32  |          #        |                            #          |       |
33  |          #        v                            #          |       |
34  +----------#######################################----------+-------+
35  |          |        ^                            |          |       |
36  |          |        |vfront_porch                |          |       |
37  |          |        v                            |          |       |
38  +----------+-------------------------------------+----------+-------+
39  |          |        ^                            |          |       |
40  |          |        |vsync_len                   |          |       |
41  |          |        v                            |          |       |
42  +----------+-------------------------------------+----------+-------+
43
44
45  The following is the panel timings shown with time on the x-axis.
46  This matches the timing diagrams often found in data sheets.
47
48              Active                 Front           Sync           Back
49              Region                 Porch                          Porch
50  <-----------------------><----------------><-------------><-------------->
51    //////////////////////|
52   ////////////////////// |
53  //////////////////////  |..................               ................
54                                             _______________
55
56  Timing can be specified either as a typical value or as a tuple
57  of min, typ, max values.
58
59properties:
60
61  clock-frequency:
62    description: Panel clock in Hz
63
64  hactive:
65    $ref: /schemas/types.yaml#/definitions/uint32
66    description: Horizontal panel resolution in pixels
67
68  vactive:
69    $ref: /schemas/types.yaml#/definitions/uint32
70    description: Vertical panel resolution in pixels
71
72  hfront-porch:
73    description: Horizontal front porch panel timing
74    $ref: /schemas/types.yaml#/definitions/uint32-array
75    oneOf:
76      - maxItems: 1
77        items:
78          description: typical number of pixels
79      - minItems: 3
80        maxItems: 3
81        items:
82          description: min, typ, max number of pixels
83
84  hback-porch:
85    description: Horizontal back porch timing
86    $ref: /schemas/types.yaml#/definitions/uint32-array
87    oneOf:
88      - maxItems: 1
89        items:
90          description: typical number of pixels
91      - minItems: 3
92        maxItems: 3
93        items:
94          description: min, typ, max number of pixels
95
96  hsync-len:
97    description: Horizontal sync length panel timing
98    $ref: /schemas/types.yaml#/definitions/uint32-array
99    oneOf:
100      - maxItems: 1
101        items:
102          description: typical number of pixels
103      - minItems: 3
104        maxItems: 3
105        items:
106          description: min, typ, max number of pixels
107
108  vfront-porch:
109    description: Vertical front porch panel timing
110    $ref: /schemas/types.yaml#/definitions/uint32-array
111    oneOf:
112      - maxItems: 1
113        items:
114          description: typical number of lines
115      - minItems: 3
116        maxItems: 3
117        items:
118          description: min, typ, max number of lines
119
120  vback-porch:
121    description: Vertical back porch panel timing
122    $ref: /schemas/types.yaml#/definitions/uint32-array
123    oneOf:
124      - maxItems: 1
125        items:
126          description: typical number of lines
127      - minItems: 3
128        maxItems: 3
129        items:
130          description: min, typ, max number of lines
131
132  vsync-len:
133    description: Vertical sync length panel timing
134    $ref: /schemas/types.yaml#/definitions/uint32-array
135    oneOf:
136      - maxItems: 1
137        items:
138          description: typical number of lines
139      - minItems: 3
140        maxItems: 3
141        items:
142          description: min, typ, max number of lines
143
144  hsync-active:
145    description: |
146      Horizontal sync pulse.
147      0 selects active low, 1 selects active high.
148      If omitted then it is not used by the hardware
149    enum: [0, 1]
150
151  vsync-active:
152    description: |
153      Vertical sync pulse.
154      0 selects active low, 1 selects active high.
155      If omitted then it is not used by the hardware
156    enum: [0, 1]
157
158  de-active:
159    description: |
160      Data enable.
161      0 selects active low, 1 selects active high.
162      If omitted then it is not used by the hardware
163    enum: [0, 1]
164
165  pixelclk-active:
166    description: |
167      Data driving on rising or falling edge.
168      Use 0 to drive pixel data on falling edge and
169      sample data on rising edge.
170      Use 1 to drive pixel data on rising edge and
171      sample data on falling edge
172    enum: [0, 1]
173
174  syncclk-active:
175    description: |
176      Drive sync on rising or sample sync on falling edge.
177      If not specified then the setup is as specified by pixelclk-active.
178      Use 0 to drive sync on falling edge and
179      sample sync on rising edge of pixel clock.
180      Use 1 to drive sync on rising edge and
181      sample sync on falling edge of pixel clock
182    enum: [0, 1]
183
184  interlaced:
185    type: boolean
186    description: Enable interlaced mode
187
188  doublescan:
189    type: boolean
190    description: Enable double scan mode
191
192  doubleclk:
193    type: boolean
194    description: Enable double clock mode
195
196required:
197  - clock-frequency
198  - hactive
199  - vactive
200  - hfront-porch
201  - hback-porch
202  - hsync-len
203  - vfront-porch
204  - vback-porch
205  - vsync-len
206
207additionalProperties: false
208
209...
210