1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DPU dt properties for SDM845 target
8
9maintainers:
10  - Krishna Manikandan <quic_mkrishn@quicinc.com>
11
12$ref: /schemas/display/msm/dpu-common.yaml#
13
14properties:
15  compatible:
16    items:
17      - const: qcom,sdm845-dpu
18
19  reg:
20    items:
21      - description: Address offset and size for mdp register set
22      - description: Address offset and size for vbif register set
23
24  reg-names:
25    items:
26      - const: mdp
27      - const: vbif
28
29  clocks:
30    items:
31      - description: Display GCC bus clock
32      - description: Display ahb clock
33      - description: Display axi clock
34      - description: Display core clock
35      - description: Display vsync clock
36
37  clock-names:
38    items:
39      - const: gcc-bus
40      - const: iface
41      - const: bus
42      - const: core
43      - const: vsync
44
45unevaluatedProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
50    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
51    #include <dt-bindings/power/qcom-rpmpd.h>
52
53    display-controller@ae01000 {
54        compatible = "qcom,sdm845-dpu";
55        reg = <0x0ae01000 0x8f000>,
56              <0x0aeb0000 0x2008>;
57        reg-names = "mdp", "vbif";
58
59        clocks = <&gcc GCC_DISP_AXI_CLK>,
60                 <&dispcc DISP_CC_MDSS_AHB_CLK>,
61                 <&dispcc DISP_CC_MDSS_AXI_CLK>,
62                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
63                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
64        clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
65
66        interrupt-parent = <&mdss>;
67        interrupts = <0>;
68        power-domains = <&rpmhpd SDM845_CX>;
69        operating-points-v2 = <&mdp_opp_table>;
70
71        ports {
72            #address-cells = <1>;
73            #size-cells = <0>;
74
75            port@0 {
76                reg = <0>;
77                endpoint {
78                    remote-endpoint = <&dsi0_in>;
79                };
80            };
81
82            port@1 {
83                reg = <1>;
84                endpoint {
85                    remote-endpoint = <&dsi1_in>;
86                };
87            };
88        };
89    };
90...
91