1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DPU dt properties for QCM2290 target
8
9maintainers:
10  - Loic Poulain <loic.poulain@linaro.org>
11
12$ref: /schemas/display/msm/dpu-common.yaml#
13
14properties:
15  compatible:
16    items:
17      - const: qcom,qcm2290-dpu
18
19  reg:
20    items:
21      - description: Address offset and size for mdp register set
22      - description: Address offset and size for vbif register set
23
24  reg-names:
25    items:
26      - const: mdp
27      - const: vbif
28
29  clocks:
30    items:
31      - description: Display AXI clock from gcc
32      - description: Display AHB clock from dispcc
33      - description: Display core clock from dispcc
34      - description: Display lut clock from dispcc
35      - description: Display vsync clock from dispcc
36
37  clock-names:
38    items:
39      - const: bus
40      - const: iface
41      - const: core
42      - const: lut
43      - const: vsync
44
45unevaluatedProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/clock/qcom,dispcc-qcm2290.h>
50    #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
51    #include <dt-bindings/power/qcom-rpmpd.h>
52
53    display-controller@5e01000 {
54        compatible = "qcom,qcm2290-dpu";
55        reg = <0x05e01000 0x8f000>,
56              <0x05eb0000 0x2008>;
57        reg-names = "mdp", "vbif";
58
59        clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
60                 <&dispcc DISP_CC_MDSS_AHB_CLK>,
61                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
62                 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
63                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
64        clock-names = "bus", "iface", "core", "lut", "vsync";
65
66        operating-points-v2 = <&mdp_opp_table>;
67        power-domains = <&rpmpd QCM2290_VDDCX>;
68
69        interrupt-parent = <&mdss>;
70        interrupts = <0>;
71
72        ports {
73            #address-cells = <1>;
74            #size-cells = <0>;
75
76            port@0 {
77                reg = <0>;
78                endpoint {
79                    remote-endpoint = <&dsi0_in>;
80                };
81            };
82        };
83    };
84...
85