1*440b075bSKrzysztof Kozlowski# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 262d1449dSRobert Foss%YAML 1.2 362d1449dSRobert Foss--- 462d1449dSRobert Foss$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml# 562d1449dSRobert Foss$schema: http://devicetree.org/meta-schemas/core.yaml# 662d1449dSRobert Foss 762d1449dSRobert Fosstitle: Qualcomm SM8350 Display DPU 862d1449dSRobert Foss 962d1449dSRobert Fossmaintainers: 1062d1449dSRobert Foss - Robert Foss <robert.foss@linaro.org> 1162d1449dSRobert Foss 1262d1449dSRobert Foss$ref: /schemas/display/msm/dpu-common.yaml# 1362d1449dSRobert Foss 1462d1449dSRobert Fossproperties: 1562d1449dSRobert Foss compatible: 1662d1449dSRobert Foss const: qcom,sm8350-dpu 1762d1449dSRobert Foss 1862d1449dSRobert Foss reg: 1962d1449dSRobert Foss items: 2062d1449dSRobert Foss - description: Address offset and size for mdp register set 2162d1449dSRobert Foss - description: Address offset and size for vbif register set 2262d1449dSRobert Foss 2362d1449dSRobert Foss reg-names: 2462d1449dSRobert Foss items: 2562d1449dSRobert Foss - const: mdp 2662d1449dSRobert Foss - const: vbif 2762d1449dSRobert Foss 2862d1449dSRobert Foss clocks: 2962d1449dSRobert Foss items: 3062d1449dSRobert Foss - description: Display hf axi clock 3162d1449dSRobert Foss - description: Display sf axi clock 3262d1449dSRobert Foss - description: Display ahb clock 3362d1449dSRobert Foss - description: Display lut clock 3462d1449dSRobert Foss - description: Display core clock 3562d1449dSRobert Foss - description: Display vsync clock 3662d1449dSRobert Foss 3762d1449dSRobert Foss clock-names: 3862d1449dSRobert Foss items: 3962d1449dSRobert Foss - const: bus 4062d1449dSRobert Foss - const: nrt_bus 4162d1449dSRobert Foss - const: iface 4262d1449dSRobert Foss - const: lut 4362d1449dSRobert Foss - const: core 4462d1449dSRobert Foss - const: vsync 4562d1449dSRobert Foss 4662d1449dSRobert FossunevaluatedProperties: false 4762d1449dSRobert Foss 4862d1449dSRobert Fossexamples: 4962d1449dSRobert Foss - | 5062d1449dSRobert Foss #include <dt-bindings/clock/qcom,dispcc-sm8350.h> 5162d1449dSRobert Foss #include <dt-bindings/clock/qcom,gcc-sm8350.h> 5262d1449dSRobert Foss #include <dt-bindings/interrupt-controller/arm-gic.h> 5362d1449dSRobert Foss #include <dt-bindings/interconnect/qcom,sm8350.h> 5462d1449dSRobert Foss #include <dt-bindings/power/qcom,rpmhpd.h> 5562d1449dSRobert Foss 5662d1449dSRobert Foss display-controller@ae01000 { 5762d1449dSRobert Foss compatible = "qcom,sm8350-dpu"; 5862d1449dSRobert Foss reg = <0x0ae01000 0x8f000>, 5962d1449dSRobert Foss <0x0aeb0000 0x2008>; 6062d1449dSRobert Foss reg-names = "mdp", "vbif"; 6162d1449dSRobert Foss 6262d1449dSRobert Foss clocks = <&gcc GCC_DISP_HF_AXI_CLK>, 6362d1449dSRobert Foss <&gcc GCC_DISP_SF_AXI_CLK>, 6462d1449dSRobert Foss <&dispcc DISP_CC_MDSS_AHB_CLK>, 6562d1449dSRobert Foss <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, 6662d1449dSRobert Foss <&dispcc DISP_CC_MDSS_MDP_CLK>, 6762d1449dSRobert Foss <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 6862d1449dSRobert Foss clock-names = "bus", 6962d1449dSRobert Foss "nrt_bus", 7062d1449dSRobert Foss "iface", 7162d1449dSRobert Foss "lut", 7262d1449dSRobert Foss "core", 7362d1449dSRobert Foss "vsync"; 7462d1449dSRobert Foss 7562d1449dSRobert Foss assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 7662d1449dSRobert Foss assigned-clock-rates = <19200000>; 7762d1449dSRobert Foss 7862d1449dSRobert Foss operating-points-v2 = <&mdp_opp_table>; 7962d1449dSRobert Foss power-domains = <&rpmhpd RPMHPD_MMCX>; 8062d1449dSRobert Foss 8162d1449dSRobert Foss interrupt-parent = <&mdss>; 8262d1449dSRobert Foss interrupts = <0>; 8362d1449dSRobert Foss 8462d1449dSRobert Foss ports { 8562d1449dSRobert Foss #address-cells = <1>; 8662d1449dSRobert Foss #size-cells = <0>; 8762d1449dSRobert Foss 8862d1449dSRobert Foss port@0 { 8962d1449dSRobert Foss reg = <0>; 9062d1449dSRobert Foss dpu_intf1_out: endpoint { 9162d1449dSRobert Foss remote-endpoint = <&dsi0_in>; 9262d1449dSRobert Foss }; 9362d1449dSRobert Foss }; 9462d1449dSRobert Foss }; 9562d1449dSRobert Foss 9662d1449dSRobert Foss mdp_opp_table: opp-table { 9762d1449dSRobert Foss compatible = "operating-points-v2"; 9862d1449dSRobert Foss 9962d1449dSRobert Foss opp-200000000 { 10062d1449dSRobert Foss opp-hz = /bits/ 64 <200000000>; 10162d1449dSRobert Foss required-opps = <&rpmhpd_opp_low_svs>; 10262d1449dSRobert Foss }; 10362d1449dSRobert Foss 10462d1449dSRobert Foss opp-300000000 { 10562d1449dSRobert Foss opp-hz = /bits/ 64 <300000000>; 10662d1449dSRobert Foss required-opps = <&rpmhpd_opp_svs>; 10762d1449dSRobert Foss }; 10862d1449dSRobert Foss 10962d1449dSRobert Foss opp-345000000 { 11062d1449dSRobert Foss opp-hz = /bits/ 64 <345000000>; 11162d1449dSRobert Foss required-opps = <&rpmhpd_opp_svs_l1>; 11262d1449dSRobert Foss }; 11362d1449dSRobert Foss 11462d1449dSRobert Foss opp-460000000 { 11562d1449dSRobert Foss opp-hz = /bits/ 64 <460000000>; 11662d1449dSRobert Foss required-opps = <&rpmhpd_opp_nom>; 11762d1449dSRobert Foss }; 11862d1449dSRobert Foss }; 11962d1449dSRobert Foss }; 12062d1449dSRobert Foss... 121