1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM8250 Display DPU
8
9maintainers:
10  - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11
12$ref: /schemas/display/msm/dpu-common.yaml#
13
14properties:
15  compatible:
16    const: qcom,sm8250-dpu
17
18  reg:
19    items:
20      - description: Address offset and size for mdp register set
21      - description: Address offset and size for vbif register set
22
23  reg-names:
24    items:
25      - const: mdp
26      - const: vbif
27
28  clocks:
29    items:
30      - description: Display ahb clock
31      - description: Display hf axi clock
32      - description: Display core clock
33      - description: Display vsync clock
34
35  clock-names:
36    items:
37      - const: iface
38      - const: bus
39      - const: core
40      - const: vsync
41
42unevaluatedProperties: false
43
44examples:
45  - |
46    #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
47    #include <dt-bindings/clock/qcom,gcc-sm8250.h>
48    #include <dt-bindings/interrupt-controller/arm-gic.h>
49    #include <dt-bindings/interconnect/qcom,sm8250.h>
50    #include <dt-bindings/power/qcom-rpmpd.h>
51
52    display-controller@ae01000 {
53        compatible = "qcom,sm8250-dpu";
54        reg = <0x0ae01000 0x8f000>,
55              <0x0aeb0000 0x2008>;
56        reg-names = "mdp", "vbif";
57
58        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
59                 <&gcc GCC_DISP_HF_AXI_CLK>,
60                 <&dispcc DISP_CC_MDSS_MDP_CLK>,
61                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
62        clock-names = "iface", "bus", "core", "vsync";
63
64        assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
65        assigned-clock-rates = <19200000>;
66
67        operating-points-v2 = <&mdp_opp_table>;
68        power-domains = <&rpmhpd SM8250_MMCX>;
69
70        interrupt-parent = <&mdss>;
71        interrupts = <0>;
72
73        ports {
74            #address-cells = <1>;
75            #size-cells = <0>;
76
77            port@0 {
78                reg = <0>;
79                endpoint {
80                    remote-endpoint = <&dsi0_in>;
81                };
82            };
83
84            port@1 {
85                reg = <1>;
86                endpoint {
87                    remote-endpoint = <&dsi1_in>;
88                };
89            };
90        };
91    };
92...
93