1*440b075bSKrzysztof Kozlowski# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 29ffbefc1SKonrad Dybcio%YAML 1.2 39ffbefc1SKonrad Dybcio--- 49ffbefc1SKonrad Dybcio$id: http://devicetree.org/schemas/display/msm/qcom,sm8150-dpu.yaml# 59ffbefc1SKonrad Dybcio$schema: http://devicetree.org/meta-schemas/core.yaml# 69ffbefc1SKonrad Dybcio 79ffbefc1SKonrad Dybciotitle: Qualcomm SM8150 Display DPU 89ffbefc1SKonrad Dybcio 99ffbefc1SKonrad Dybciomaintainers: 109ffbefc1SKonrad Dybcio - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 119ffbefc1SKonrad Dybcio 129ffbefc1SKonrad Dybcio$ref: /schemas/display/msm/dpu-common.yaml# 139ffbefc1SKonrad Dybcio 149ffbefc1SKonrad Dybcioproperties: 159ffbefc1SKonrad Dybcio compatible: 169ffbefc1SKonrad Dybcio const: qcom,sm8150-dpu 179ffbefc1SKonrad Dybcio 189ffbefc1SKonrad Dybcio reg: 199ffbefc1SKonrad Dybcio items: 209ffbefc1SKonrad Dybcio - description: Address offset and size for mdp register set 219ffbefc1SKonrad Dybcio - description: Address offset and size for vbif register set 229ffbefc1SKonrad Dybcio 239ffbefc1SKonrad Dybcio reg-names: 249ffbefc1SKonrad Dybcio items: 259ffbefc1SKonrad Dybcio - const: mdp 269ffbefc1SKonrad Dybcio - const: vbif 279ffbefc1SKonrad Dybcio 289ffbefc1SKonrad Dybcio clocks: 299ffbefc1SKonrad Dybcio items: 309ffbefc1SKonrad Dybcio - description: Display ahb clock 319ffbefc1SKonrad Dybcio - description: Display hf axi clock 329ffbefc1SKonrad Dybcio - description: Display core clock 339ffbefc1SKonrad Dybcio - description: Display vsync clock 349ffbefc1SKonrad Dybcio 359ffbefc1SKonrad Dybcio clock-names: 369ffbefc1SKonrad Dybcio items: 379ffbefc1SKonrad Dybcio - const: iface 389ffbefc1SKonrad Dybcio - const: bus 399ffbefc1SKonrad Dybcio - const: core 409ffbefc1SKonrad Dybcio - const: vsync 419ffbefc1SKonrad Dybcio 429ffbefc1SKonrad DybciounevaluatedProperties: false 439ffbefc1SKonrad Dybcio 449ffbefc1SKonrad Dybcioexamples: 459ffbefc1SKonrad Dybcio - | 469ffbefc1SKonrad Dybcio #include <dt-bindings/clock/qcom,dispcc-sm8150.h> 479ffbefc1SKonrad Dybcio #include <dt-bindings/clock/qcom,gcc-sm8150.h> 489ffbefc1SKonrad Dybcio #include <dt-bindings/interrupt-controller/arm-gic.h> 499ffbefc1SKonrad Dybcio #include <dt-bindings/interconnect/qcom,sm8150.h> 509ffbefc1SKonrad Dybcio #include <dt-bindings/power/qcom-rpmpd.h> 519ffbefc1SKonrad Dybcio 529ffbefc1SKonrad Dybcio display-controller@ae01000 { 539ffbefc1SKonrad Dybcio compatible = "qcom,sm8150-dpu"; 549ffbefc1SKonrad Dybcio reg = <0x0ae01000 0x8f000>, 559ffbefc1SKonrad Dybcio <0x0aeb0000 0x2008>; 569ffbefc1SKonrad Dybcio reg-names = "mdp", "vbif"; 579ffbefc1SKonrad Dybcio 589ffbefc1SKonrad Dybcio clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, 599ffbefc1SKonrad Dybcio <&gcc GCC_DISP_HF_AXI_CLK>, 609ffbefc1SKonrad Dybcio <&dispcc DISP_CC_MDSS_MDP_CLK>, 619ffbefc1SKonrad Dybcio <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 629ffbefc1SKonrad Dybcio clock-names = "iface", "bus", "core", "vsync"; 639ffbefc1SKonrad Dybcio 649ffbefc1SKonrad Dybcio assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>; 659ffbefc1SKonrad Dybcio assigned-clock-rates = <19200000>; 669ffbefc1SKonrad Dybcio 679ffbefc1SKonrad Dybcio operating-points-v2 = <&mdp_opp_table>; 689ffbefc1SKonrad Dybcio power-domains = <&rpmhpd SM8150_MMCX>; 699ffbefc1SKonrad Dybcio 709ffbefc1SKonrad Dybcio interrupt-parent = <&mdss>; 719ffbefc1SKonrad Dybcio interrupts = <0>; 729ffbefc1SKonrad Dybcio 739ffbefc1SKonrad Dybcio ports { 749ffbefc1SKonrad Dybcio #address-cells = <1>; 759ffbefc1SKonrad Dybcio #size-cells = <0>; 769ffbefc1SKonrad Dybcio 779ffbefc1SKonrad Dybcio port@0 { 789ffbefc1SKonrad Dybcio reg = <0>; 799ffbefc1SKonrad Dybcio endpoint { 809ffbefc1SKonrad Dybcio remote-endpoint = <&dsi0_in>; 819ffbefc1SKonrad Dybcio }; 829ffbefc1SKonrad Dybcio }; 839ffbefc1SKonrad Dybcio 849ffbefc1SKonrad Dybcio port@1 { 859ffbefc1SKonrad Dybcio reg = <1>; 869ffbefc1SKonrad Dybcio endpoint { 879ffbefc1SKonrad Dybcio remote-endpoint = <&dsi1_in>; 889ffbefc1SKonrad Dybcio }; 899ffbefc1SKonrad Dybcio }; 909ffbefc1SKonrad Dybcio }; 919ffbefc1SKonrad Dybcio }; 929ffbefc1SKonrad Dybcio... 93