1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Display DPU on MSM8998 8 9maintainers: 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 11 12$ref: /schemas/display/msm/dpu-common.yaml# 13 14properties: 15 compatible: 16 items: 17 - const: qcom,msm8998-dpu 18 19 reg: 20 items: 21 - description: Address offset and size for mdp register set 22 - description: Address offset and size for regdma register set 23 - description: Address offset and size for vbif register set 24 - description: Address offset and size for non-realtime vbif register set 25 26 reg-names: 27 items: 28 - const: mdp 29 - const: regdma 30 - const: vbif 31 - const: vbif_nrt 32 33 clocks: 34 items: 35 - description: Display ahb clock 36 - description: Display axi clock 37 - description: Display mem-noc clock 38 - description: Display core clock 39 - description: Display vsync clock 40 41 clock-names: 42 items: 43 - const: iface 44 - const: bus 45 - const: mnoc 46 - const: core 47 - const: vsync 48 49required: 50 - compatible 51 - reg 52 - reg-names 53 - clocks 54 - clock-names 55 56unevaluatedProperties: false 57 58examples: 59 - | 60 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 61 #include <dt-bindings/power/qcom-rpmpd.h> 62 63 display-controller@c901000 { 64 compatible = "qcom,msm8998-dpu"; 65 reg = <0x0c901000 0x8f000>, 66 <0x0c9a8e00 0xf0>, 67 <0x0c9b0000 0x2008>, 68 <0x0c9b8000 0x1040>; 69 reg-names = "mdp", "regdma", "vbif", "vbif_nrt"; 70 71 clocks = <&mmcc MDSS_AHB_CLK>, 72 <&mmcc MDSS_AXI_CLK>, 73 <&mmcc MNOC_AHB_CLK>, 74 <&mmcc MDSS_MDP_CLK>, 75 <&mmcc MDSS_VSYNC_CLK>; 76 clock-names = "iface", "bus", "mnoc", "core", "vsync"; 77 78 interrupt-parent = <&mdss>; 79 interrupts = <0>; 80 operating-points-v2 = <&mdp_opp_table>; 81 power-domains = <&rpmpd MSM8998_VDDMX>; 82 83 ports { 84 #address-cells = <1>; 85 #size-cells = <0>; 86 87 port@0 { 88 reg = <0>; 89 endpoint { 90 remote-endpoint = <&dsi0_in>; 91 }; 92 }; 93 94 port@1 { 95 reg = <1>; 96 endpoint { 97 remote-endpoint = <&dsi1_in>; 98 }; 99 }; 100 }; 101 }; 102... 103