1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dsi-phy-20nm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DSI 20nm PHY
8
9maintainers:
10  - Krishna Manikandan <mkrishn@codeaurora.org>
11
12allOf:
13  - $ref: dsi-phy-common.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - const: qcom,dsi-phy-20nm
19
20  reg:
21    items:
22      - description: dsi pll register set
23      - description: dsi phy register set
24      - description: dsi phy regulator register set
25
26  reg-names:
27    items:
28      - const: dsi_pll
29      - const: dsi_phy
30      - const: dsi_phy_regulator
31
32  vcca-supply:
33    description: Phandle to vcca regulator device node.
34
35  vddio-supply:
36    description: Phandle to vdd-io regulator device node.
37
38required:
39  - compatible
40  - reg
41  - reg-names
42  - vddio-supply
43  - vcca-supply
44
45unevaluatedProperties: false
46
47examples:
48  - |
49     #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
50     #include <dt-bindings/clock/qcom,rpmh.h>
51
52     dsi-phy@fd922a00 {
53         compatible = "qcom,dsi-phy-20nm";
54         reg = <0xfd922a00 0xd4>,
55               <0xfd922b00 0x2b0>,
56               <0xfd922d80 0x7b>;
57         reg-names = "dsi_pll",
58                     "dsi_phy",
59                     "dsi_phy_regulator";
60
61         #clock-cells = <1>;
62         #phy-cells = <0>;
63
64         vcca-supply = <&vcca_reg>;
65         vddio-supply = <&vddio_reg>;
66
67         clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
68                  <&rpmhcc RPMH_CXO_CLK>;
69         clock-names = "iface", "ref";
70     };
71...
72