1# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display DSI controller
8
9maintainers:
10  - Krishna Manikandan <quic_mkrishn@quicinc.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - qcom,apq8064-dsi-ctrl
18              - qcom,msm8226-dsi-ctrl
19              - qcom,msm8916-dsi-ctrl
20              - qcom,msm8953-dsi-ctrl
21              - qcom,msm8974-dsi-ctrl
22              - qcom,msm8996-dsi-ctrl
23              - qcom,msm8998-dsi-ctrl
24              - qcom,qcm2290-dsi-ctrl
25              - qcom,sc7180-dsi-ctrl
26              - qcom,sc7280-dsi-ctrl
27              - qcom,sdm660-dsi-ctrl
28              - qcom,sdm845-dsi-ctrl
29              - qcom,sm6115-dsi-ctrl
30              - qcom,sm8150-dsi-ctrl
31              - qcom,sm8250-dsi-ctrl
32              - qcom,sm8350-dsi-ctrl
33              - qcom,sm8450-dsi-ctrl
34              - qcom,sm8550-dsi-ctrl
35          - const: qcom,mdss-dsi-ctrl
36      - enum:
37          - qcom,dsi-ctrl-6g-qcm2290
38          - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
39        deprecated: true
40
41  reg:
42    maxItems: 1
43
44  reg-names:
45    const: dsi_ctrl
46
47  interrupts:
48    maxItems: 1
49
50  clocks:
51    description: |
52      Several clocks are used, depending on the variant. Typical ones are::
53       - bus:: Display AHB clock.
54       - byte:: Display byte clock.
55       - byte_intf:: Display byte interface clock.
56       - core:: Display core clock.
57       - core_mss:: Core MultiMedia SubSystem clock.
58       - iface:: Display AXI clock.
59       - mdp_core:: MDP Core clock.
60       - mnoc:: MNOC clock
61       - pixel:: Display pixel clock.
62    minItems: 3
63    maxItems: 9
64
65  clock-names:
66    minItems: 3
67    maxItems: 9
68
69  phys:
70    maxItems: 1
71
72  phy-names:
73    deprecated: true
74    const: dsi
75
76  syscon-sfpb:
77    description: A phandle to mmss_sfpb syscon node (only for DSIv2).
78    $ref: "/schemas/types.yaml#/definitions/phandle"
79
80  qcom,dual-dsi-mode:
81    type: boolean
82    description: |
83      Indicates if the DSI controller is driving a panel which needs
84      2 DSI links.
85
86  qcom,master-dsi:
87    type: boolean
88    description: |
89      Indicates if the DSI controller is the master DSI controller when
90      qcom,dual-dsi-mode enabled.
91
92  qcom,sync-dual-dsi:
93    type: boolean
94    description: |
95      Indicates if the DSI controller needs to sync the other DSI controller
96      with MIPI DCS commands when qcom,dual-dsi-mode enabled.
97
98  assigned-clocks:
99    minItems: 2
100    maxItems: 4
101    description: |
102      Parents of "byte" and "pixel" for the given platform.
103      For DSIv2 platforms this should contain "byte", "esc", "src" and
104      "pixel_src" clocks.
105
106  assigned-clock-parents:
107    minItems: 2
108    maxItems: 4
109    description: |
110      The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
111
112  power-domains:
113    maxItems: 1
114
115  operating-points-v2: true
116
117  opp-table:
118    type: object
119
120  ports:
121    $ref: "/schemas/graph.yaml#/properties/ports"
122    description: |
123      Contains DSI controller input and output ports as children, each
124      containing one endpoint subnode.
125
126    properties:
127      port@0:
128        $ref: "/schemas/graph.yaml#/$defs/port-base"
129        unevaluatedProperties: false
130        description: |
131          Input endpoints of the controller.
132        properties:
133          endpoint:
134            $ref: /schemas/media/video-interfaces.yaml#
135            unevaluatedProperties: false
136            properties:
137              data-lanes:
138                maxItems: 4
139                minItems: 1
140                items:
141                  enum: [ 0, 1, 2, 3 ]
142
143      port@1:
144        $ref: "/schemas/graph.yaml#/$defs/port-base"
145        unevaluatedProperties: false
146        description: |
147          Output endpoints of the controller.
148        properties:
149          endpoint:
150            $ref: /schemas/media/video-interfaces.yaml#
151            unevaluatedProperties: false
152            properties:
153              data-lanes:
154                maxItems: 4
155                minItems: 1
156                items:
157                  enum: [ 0, 1, 2, 3 ]
158
159    required:
160      - port@0
161      - port@1
162
163  avdd-supply:
164    description:
165      Phandle to vdd regulator device node
166
167  vcca-supply:
168    description:
169      Phandle to vdd regulator device node
170
171  vdd-supply:
172    description:
173      VDD regulator
174
175  vddio-supply:
176    description:
177      VDD-IO regulator
178
179  vdda-supply:
180    description:
181      VDDA regulator
182
183required:
184  - compatible
185  - reg
186  - reg-names
187  - interrupts
188  - clocks
189  - clock-names
190  - phys
191  - assigned-clocks
192  - assigned-clock-parents
193  - ports
194
195allOf:
196  - $ref: ../dsi-controller.yaml#
197  - if:
198      properties:
199        compatible:
200          contains:
201            enum:
202              - qcom,apq8064-dsi-ctrl
203    then:
204      properties:
205        clocks:
206          maxItems: 7
207        clock-names:
208          items:
209            - const: iface
210            - const: bus
211            - const: core_mmss
212            - const: src
213            - const: byte
214            - const: pixel
215            - const: core
216
217  - if:
218      properties:
219        compatible:
220          contains:
221            enum:
222              - qcom,msm8916-dsi-ctrl
223    then:
224      properties:
225        clocks:
226          maxItems: 6
227        clock-names:
228          items:
229            - const: mdp_core
230            - const: iface
231            - const: bus
232            - const: byte
233            - const: pixel
234            - const: core
235
236  - if:
237      properties:
238        compatible:
239          contains:
240            enum:
241              - qcom,msm8953-dsi-ctrl
242    then:
243      properties:
244        clocks:
245          maxItems: 6
246        clock-names:
247          items:
248            - const: mdp_core
249            - const: iface
250            - const: bus
251            - const: byte
252            - const: pixel
253            - const: core
254
255  - if:
256      properties:
257        compatible:
258          contains:
259            enum:
260              - qcom,msm8226-dsi-ctrl
261              - qcom,msm8974-dsi-ctrl
262    then:
263      properties:
264        clocks:
265          maxItems: 7
266        clock-names:
267          items:
268            - const: mdp_core
269            - const: iface
270            - const: bus
271            - const: byte
272            - const: pixel
273            - const: core
274            - const: core_mmss
275
276  - if:
277      properties:
278        compatible:
279          contains:
280            enum:
281              - qcom,msm8996-dsi-ctrl
282    then:
283      properties:
284        clocks:
285          maxItems: 7
286        clock-names:
287          items:
288            - const: mdp_core
289            - const: byte
290            - const: iface
291            - const: bus
292            - const: core_mmss
293            - const: pixel
294            - const: core
295
296  - if:
297      properties:
298        compatible:
299          contains:
300            enum:
301              - qcom,msm8998-dsi-ctrl
302    then:
303      properties:
304        clocks:
305          maxItems: 6
306        clock-names:
307          items:
308            - const: byte
309            - const: byte_intf
310            - const: pixel
311            - const: core
312            - const: iface
313            - const: bus
314
315  - if:
316      properties:
317        compatible:
318          contains:
319            enum:
320              - qcom,sc7180-dsi-ctrl
321              - qcom,sc7280-dsi-ctrl
322              - qcom,sm8150-dsi-ctrl
323              - qcom,sm8250-dsi-ctrl
324              - qcom,sm8350-dsi-ctrl
325              - qcom,sm8450-dsi-ctrl
326              - qcom,sm8550-dsi-ctrl
327    then:
328      properties:
329        clocks:
330          maxItems: 6
331        clock-names:
332          items:
333            - const: byte
334            - const: byte_intf
335            - const: pixel
336            - const: core
337            - const: iface
338            - const: bus
339
340  - if:
341      properties:
342        compatible:
343          contains:
344            enum:
345              - qcom,sdm660-dsi-ctrl
346    then:
347      properties:
348        clocks:
349          maxItems: 9
350        clock-names:
351          items:
352            - const: mdp_core
353            - const: byte
354            - const: byte_intf
355            - const: mnoc
356            - const: iface
357            - const: bus
358            - const: core_mmss
359            - const: pixel
360            - const: core
361
362  - if:
363      properties:
364        compatible:
365          contains:
366            enum:
367              - qcom,sdm845-dsi-ctrl
368              - qcom,sm6115-dsi-ctrl
369    then:
370      properties:
371        clocks:
372          maxItems: 6
373        clock-names:
374          items:
375            - const: byte
376            - const: byte_intf
377            - const: pixel
378            - const: core
379            - const: iface
380            - const: bus
381
382unevaluatedProperties: false
383
384examples:
385  - |
386     #include <dt-bindings/interrupt-controller/arm-gic.h>
387     #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
388     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
389     #include <dt-bindings/power/qcom-rpmpd.h>
390
391     dsi@ae94000 {
392           compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
393           reg = <0x0ae94000 0x400>;
394           reg-names = "dsi_ctrl";
395
396           #address-cells = <1>;
397           #size-cells = <0>;
398
399           interrupt-parent = <&mdss>;
400           interrupts = <4>;
401
402           clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
403                    <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
404                    <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
405                    <&dispcc DISP_CC_MDSS_ESC0_CLK>,
406                    <&dispcc DISP_CC_MDSS_AHB_CLK>,
407                    <&dispcc DISP_CC_MDSS_AXI_CLK>;
408           clock-names = "byte",
409                         "byte_intf",
410                         "pixel",
411                         "core",
412                         "iface",
413                         "bus";
414
415           phys = <&dsi0_phy>;
416           phy-names = "dsi";
417
418           assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
419           assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
420
421           power-domains = <&rpmhpd SC7180_CX>;
422           operating-points-v2 = <&dsi_opp_table>;
423
424           ports {
425                  #address-cells = <1>;
426                  #size-cells = <0>;
427
428                  port@0 {
429                          reg = <0>;
430                          dsi0_in: endpoint {
431                                   remote-endpoint = <&dpu_intf1_out>;
432                          };
433                  };
434
435                  port@1 {
436                          reg = <1>;
437                          dsi0_out: endpoint {
438                                   remote-endpoint = <&sn65dsi86_in>;
439                                   data-lanes = <0 1 2 3>;
440                          };
441                  };
442           };
443     };
444...
445