1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MSM Display Port Controller
8
9maintainers:
10  - Kuogee Hsieh <khsieh@codeaurora.org>
11
12description: |
13  Device tree bindings for DisplayPort host controller for MSM targets
14  that are compatible with VESA DisplayPort interface specification.
15
16properties:
17  compatible:
18    enum:
19      - qcom,sc7180-dp
20      - qcom,sc7280-dp
21      - qcom,sc7280-edp
22      - qcom,sc8180x-dp
23      - qcom,sc8180x-edp
24
25  reg:
26    items:
27      - description: ahb register block
28      - description: aux register block
29      - description: link register block
30      - description: p0 register block
31      - description: p1 register block
32
33  interrupts:
34    maxItems: 1
35
36  clocks:
37    items:
38      - description: AHB clock to enable register access
39      - description: Display Port AUX clock
40      - description: Display Port Link clock
41      - description: Link interface clock between DP and PHY
42      - description: Display Port Pixel clock
43
44  clock-names:
45    items:
46      - const: core_iface
47      - const: core_aux
48      - const: ctrl_link
49      - const: ctrl_link_iface
50      - const: stream_pixel
51
52  assigned-clocks:
53    items:
54      - description: link clock source
55      - description: pixel clock source
56
57  assigned-clock-parents:
58    items:
59      - description: phy 0 parent
60      - description: phy 1 parent
61
62  phys:
63    maxItems: 1
64
65  phy-names:
66    items:
67      - const: dp
68
69  operating-points-v2:
70    maxItems: 1
71
72  power-domains:
73    maxItems: 1
74
75  "#sound-dai-cells":
76    const: 0
77
78  ports:
79    $ref: /schemas/graph.yaml#/properties/ports
80    properties:
81      port@0:
82        $ref: /schemas/graph.yaml#/properties/port
83        description: Input endpoint of the controller
84
85      port@1:
86        $ref: /schemas/graph.yaml#/properties/port
87        description: Output endpoint of the controller
88
89required:
90  - compatible
91  - reg
92  - interrupts
93  - clocks
94  - clock-names
95  - phys
96  - phy-names
97  - "#sound-dai-cells"
98  - power-domains
99  - ports
100
101additionalProperties: false
102
103examples:
104  - |
105    #include <dt-bindings/interrupt-controller/arm-gic.h>
106    #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
107    #include <dt-bindings/power/qcom-rpmpd.h>
108
109    displayport-controller@ae90000 {
110        compatible = "qcom,sc7180-dp";
111        reg = <0xae90000 0x200>,
112              <0xae90200 0x200>,
113              <0xae90400 0xc00>,
114              <0xae91000 0x400>,
115              <0xae91400 0x400>;
116        interrupt-parent = <&mdss>;
117        interrupts = <12>;
118        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
119                 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
120                 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
121                 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
122                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
123        clock-names = "core_iface", "core_aux",
124                      "ctrl_link",
125                      "ctrl_link_iface", "stream_pixel";
126
127        assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
128                          <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
129
130        assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
131
132        phys = <&dp_phy>;
133        phy-names = "dp";
134
135        #sound-dai-cells = <0>;
136
137        power-domains = <&rpmhpd SC7180_CX>;
138
139        ports {
140            #address-cells = <1>;
141            #size-cells = <0>;
142
143            port@0 {
144                reg = <0>;
145                endpoint {
146                    remote-endpoint = <&dpu_intf0_out>;
147                };
148            };
149
150            port@1 {
151                reg = <1>;
152                endpoint {
153                    remote-endpoint = <&typec>;
154                };
155            };
156        };
157    };
158...
159