1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MSM Display Port Controller
8
9maintainers:
10  - Kuogee Hsieh <khsieh@codeaurora.org>
11
12description: |
13  Device tree bindings for DisplayPort host controller for MSM targets
14  that are compatible with VESA DisplayPort interface specification.
15
16properties:
17  compatible:
18    enum:
19      - qcom,sc7180-dp
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    items:
29      - description: AHB clock to enable register access
30      - description: Display Port AUX clock
31      - description: Display Port Link clock
32      - description: Link interface clock between DP and PHY
33      - description: Display Port Pixel clock
34
35  clock-names:
36    items:
37      - const: core_iface
38      - const: core_aux
39      - const: ctrl_link
40      - const: ctrl_link_iface
41      - const: stream_pixel
42
43  assigned-clocks:
44    items:
45      - description: link clock source
46      - description: pixel clock source
47
48  assigned-clock-parents:
49    items:
50      - description: phy 0 parent
51      - description: phy 1 parent
52
53  phys:
54    maxItems: 1
55
56  phy-names:
57    items:
58      - const: dp
59
60  operating-points-v2:
61    maxItems: 1
62
63  power-domains:
64    maxItems: 1
65
66  "#sound-dai-cells":
67    const: 0
68
69  ports:
70    $ref: /schemas/graph.yaml#/properties/ports
71    properties:
72      port@0:
73        $ref: /schemas/graph.yaml#/properties/port
74        description: Input endpoint of the controller
75
76      port@1:
77        $ref: /schemas/graph.yaml#/properties/port
78        description: Output endpoint of the controller
79
80required:
81  - compatible
82  - reg
83  - interrupts
84  - clocks
85  - clock-names
86  - phys
87  - phy-names
88  - "#sound-dai-cells"
89  - power-domains
90  - ports
91
92additionalProperties: false
93
94examples:
95  - |
96    #include <dt-bindings/interrupt-controller/arm-gic.h>
97    #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
98    #include <dt-bindings/power/qcom-aoss-qmp.h>
99    #include <dt-bindings/power/qcom-rpmpd.h>
100
101    displayport-controller@ae90000 {
102        compatible = "qcom,sc7180-dp";
103        reg = <0xae90000 0x1400>;
104        interrupt-parent = <&mdss>;
105        interrupts = <12>;
106        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
107                 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
108                 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
109                 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
110                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
111        clock-names = "core_iface", "core_aux",
112                      "ctrl_link",
113                      "ctrl_link_iface", "stream_pixel";
114
115        assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
116                          <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
117
118        assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
119
120        phys = <&dp_phy>;
121        phy-names = "dp";
122
123        #sound-dai-cells = <0>;
124
125        power-domains = <&rpmhpd SC7180_CX>;
126
127        ports {
128            #address-cells = <1>;
129            #size-cells = <0>;
130
131            port@0 {
132                reg = <0>;
133                endpoint {
134                    remote-endpoint = <&dpu_intf0_out>;
135                };
136            };
137
138            port@1 {
139                reg = <1>;
140                endpoint {
141                    remote-endpoint = <&typec>;
142                };
143            };
144        };
145    };
146...
147