1*665a6961SKrishna Manikandan# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*665a6961SKrishna Manikandan%YAML 1.2
3*665a6961SKrishna Manikandan---
4*665a6961SKrishna Manikandan$id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5*665a6961SKrishna Manikandan$schema: http://devicetree.org/meta-schemas/core.yaml#
6*665a6961SKrishna Manikandan
7*665a6961SKrishna Manikandantitle: MSM Display Port Controller
8*665a6961SKrishna Manikandan
9*665a6961SKrishna Manikandanmaintainers:
10*665a6961SKrishna Manikandan  - Kuogee Hsieh <khsieh@codeaurora.org>
11*665a6961SKrishna Manikandan
12*665a6961SKrishna Manikandandescription: |
13*665a6961SKrishna Manikandan  Device tree bindings for DisplayPort host controller for MSM targets
14*665a6961SKrishna Manikandan  that are compatible with VESA DisplayPort interface specification.
15*665a6961SKrishna Manikandan
16*665a6961SKrishna Manikandanproperties:
17*665a6961SKrishna Manikandan  compatible:
18*665a6961SKrishna Manikandan    enum:
19*665a6961SKrishna Manikandan      - qcom,sc7180-dp
20*665a6961SKrishna Manikandan
21*665a6961SKrishna Manikandan  reg:
22*665a6961SKrishna Manikandan    maxItems: 1
23*665a6961SKrishna Manikandan
24*665a6961SKrishna Manikandan  interrupts:
25*665a6961SKrishna Manikandan    maxItems: 1
26*665a6961SKrishna Manikandan
27*665a6961SKrishna Manikandan  clocks:
28*665a6961SKrishna Manikandan    items:
29*665a6961SKrishna Manikandan      - description: AHB clock to enable register access
30*665a6961SKrishna Manikandan      - description: Display Port AUX clock
31*665a6961SKrishna Manikandan      - description: Display Port Link clock
32*665a6961SKrishna Manikandan      - description: Link interface clock between DP and PHY
33*665a6961SKrishna Manikandan      - description: Display Port Pixel clock
34*665a6961SKrishna Manikandan
35*665a6961SKrishna Manikandan  clock-names:
36*665a6961SKrishna Manikandan    items:
37*665a6961SKrishna Manikandan      - const: core_iface
38*665a6961SKrishna Manikandan      - const: core_aux
39*665a6961SKrishna Manikandan      - const: ctrl_link
40*665a6961SKrishna Manikandan      - const: ctrl_link_iface
41*665a6961SKrishna Manikandan      - const: stream_pixel
42*665a6961SKrishna Manikandan
43*665a6961SKrishna Manikandan  assigned-clocks:
44*665a6961SKrishna Manikandan    items:
45*665a6961SKrishna Manikandan      - description: link clock source
46*665a6961SKrishna Manikandan      - description: pixel clock source
47*665a6961SKrishna Manikandan
48*665a6961SKrishna Manikandan  assigned-clock-parents:
49*665a6961SKrishna Manikandan    items:
50*665a6961SKrishna Manikandan      - description: phy 0 parent
51*665a6961SKrishna Manikandan      - description: phy 1 parent
52*665a6961SKrishna Manikandan
53*665a6961SKrishna Manikandan  phys:
54*665a6961SKrishna Manikandan    maxItems: 1
55*665a6961SKrishna Manikandan
56*665a6961SKrishna Manikandan  phy-names:
57*665a6961SKrishna Manikandan    items:
58*665a6961SKrishna Manikandan      - const: dp
59*665a6961SKrishna Manikandan
60*665a6961SKrishna Manikandan  operating-points-v2:
61*665a6961SKrishna Manikandan    maxItems: 1
62*665a6961SKrishna Manikandan
63*665a6961SKrishna Manikandan  power-domains:
64*665a6961SKrishna Manikandan    maxItems: 1
65*665a6961SKrishna Manikandan
66*665a6961SKrishna Manikandan  "#sound-dai-cells":
67*665a6961SKrishna Manikandan    const: 0
68*665a6961SKrishna Manikandan
69*665a6961SKrishna Manikandan  ports:
70*665a6961SKrishna Manikandan    $ref: /schemas/graph.yaml#/properties/ports
71*665a6961SKrishna Manikandan    properties:
72*665a6961SKrishna Manikandan      port@0:
73*665a6961SKrishna Manikandan        $ref: /schemas/graph.yaml#/properties/port
74*665a6961SKrishna Manikandan        description: Input endpoint of the controller
75*665a6961SKrishna Manikandan
76*665a6961SKrishna Manikandan      port@1:
77*665a6961SKrishna Manikandan        $ref: /schemas/graph.yaml#/properties/port
78*665a6961SKrishna Manikandan        description: Output endpoint of the controller
79*665a6961SKrishna Manikandan
80*665a6961SKrishna Manikandanrequired:
81*665a6961SKrishna Manikandan  - compatible
82*665a6961SKrishna Manikandan  - reg
83*665a6961SKrishna Manikandan  - interrupts
84*665a6961SKrishna Manikandan  - clocks
85*665a6961SKrishna Manikandan  - clock-names
86*665a6961SKrishna Manikandan  - phys
87*665a6961SKrishna Manikandan  - phy-names
88*665a6961SKrishna Manikandan  - "#sound-dai-cells"
89*665a6961SKrishna Manikandan  - power-domains
90*665a6961SKrishna Manikandan  - ports
91*665a6961SKrishna Manikandan
92*665a6961SKrishna ManikandanadditionalProperties: false
93*665a6961SKrishna Manikandan
94*665a6961SKrishna Manikandanexamples:
95*665a6961SKrishna Manikandan  - |
96*665a6961SKrishna Manikandan    #include <dt-bindings/interrupt-controller/arm-gic.h>
97*665a6961SKrishna Manikandan    #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
98*665a6961SKrishna Manikandan    #include <dt-bindings/power/qcom-aoss-qmp.h>
99*665a6961SKrishna Manikandan    #include <dt-bindings/power/qcom-rpmpd.h>
100*665a6961SKrishna Manikandan
101*665a6961SKrishna Manikandan    displayport-controller@ae90000 {
102*665a6961SKrishna Manikandan        compatible = "qcom,sc7180-dp";
103*665a6961SKrishna Manikandan        reg = <0xae90000 0x1400>;
104*665a6961SKrishna Manikandan        interrupt-parent = <&mdss>;
105*665a6961SKrishna Manikandan        interrupts = <12>;
106*665a6961SKrishna Manikandan        clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
107*665a6961SKrishna Manikandan                 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
108*665a6961SKrishna Manikandan                 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
109*665a6961SKrishna Manikandan                 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
110*665a6961SKrishna Manikandan                 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
111*665a6961SKrishna Manikandan        clock-names = "core_iface", "core_aux",
112*665a6961SKrishna Manikandan                      "ctrl_link",
113*665a6961SKrishna Manikandan                      "ctrl_link_iface", "stream_pixel";
114*665a6961SKrishna Manikandan
115*665a6961SKrishna Manikandan        assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
116*665a6961SKrishna Manikandan                          <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
117*665a6961SKrishna Manikandan
118*665a6961SKrishna Manikandan        assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
119*665a6961SKrishna Manikandan
120*665a6961SKrishna Manikandan        phys = <&dp_phy>;
121*665a6961SKrishna Manikandan        phy-names = "dp";
122*665a6961SKrishna Manikandan
123*665a6961SKrishna Manikandan        #sound-dai-cells = <0>;
124*665a6961SKrishna Manikandan
125*665a6961SKrishna Manikandan        power-domains = <&rpmhpd SC7180_CX>;
126*665a6961SKrishna Manikandan
127*665a6961SKrishna Manikandan        ports {
128*665a6961SKrishna Manikandan            #address-cells = <1>;
129*665a6961SKrishna Manikandan            #size-cells = <0>;
130*665a6961SKrishna Manikandan
131*665a6961SKrishna Manikandan            port@0 {
132*665a6961SKrishna Manikandan                reg = <0>;
133*665a6961SKrishna Manikandan                endpoint {
134*665a6961SKrishna Manikandan                    remote-endpoint = <&dpu_intf0_out>;
135*665a6961SKrishna Manikandan                };
136*665a6961SKrishna Manikandan            };
137*665a6961SKrishna Manikandan
138*665a6961SKrishna Manikandan            port@1 {
139*665a6961SKrishna Manikandan                reg = <1>;
140*665a6961SKrishna Manikandan                endpoint {
141*665a6961SKrishna Manikandan                    remote-endpoint = <&typec>;
142*665a6961SKrishna Manikandan                };
143*665a6961SKrishna Manikandan            };
144*665a6961SKrishna Manikandan        };
145*665a6961SKrishna Manikandan    };
146*665a6961SKrishna Manikandan...
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