1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/mediatek/mediatek,wdma.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek Write Direct Memory Access
8
9maintainers:
10  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11  - Philipp Zabel <p.zabel@pengutronix.de>
12
13description: |
14  Mediatek Write Direct Memory Access(WDMA) component used to write
15  the data into DMA.
16  WDMA device node must be siblings to the central MMSYS_CONFIG node.
17  For a description of the MMSYS_CONFIG binding, see
18  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
19  for details.
20
21properties:
22  compatible:
23    oneOf:
24      - items:
25          - const: mediatek,mt8173-disp-wdma
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    maxItems: 1
32
33  power-domains:
34    description: A phandle and PM domain specifier as defined by bindings of
35      the power controller specified by phandle. See
36      Documentation/devicetree/bindings/power/power-domain.yaml for details.
37
38  clocks:
39    items:
40      - description: WDMA Clock
41
42  iommus:
43    description:
44      This property should point to the respective IOMMU block with master port as argument,
45      see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
46
47  mediatek,larb:
48    description:
49      This property should contain a phandle pointing to the local arbiter devices defined in
50      Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml.
51      It must sort according to the local arbiter index, like larb0, larb1, larb2...
52    $ref: /schemas/types.yaml#/definitions/phandle-array
53    minItems: 1
54    maxItems: 32
55
56  mediatek,gce-client-reg:
57    description: The register of client driver can be configured by gce with
58      4 arguments defined in this property, such as phandle of gce, subsys id,
59      register offset and size. Each GCE subsys id is mapping to a client
60      defined in the header include/dt-bindings/gce/<chip>-gce.h.
61    $ref: /schemas/types.yaml#/definitions/phandle-array
62    maxItems: 1
63
64required:
65  - compatible
66  - reg
67  - interrupts
68  - power-domains
69  - clocks
70  - iommus
71
72additionalProperties: false
73
74examples:
75  - |
76
77    wdma0: wdma@14011000 {
78        compatible = "mediatek,mt8173-disp-wdma";
79        reg = <0 0x14011000 0 0x1000>;
80        interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_LOW>;
81        power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
82        clocks = <&mmsys CLK_MM_DISP_WDMA0>;
83        iommus = <&iommu M4U_PORT_DISP_WDMA0>;
84        mediatek,larb = <&larb0>;
85        mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
86    };
87