1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/mediatek/mediatek,aal.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek display adaptive ambient light processor 8 9maintainers: 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 12 13description: | 14 Mediatek display adaptive ambient light processor, namely AAL, 15 is responsible for backlight power saving and sunlight visibility improving. 16 AAL device node must be siblings to the central MMSYS_CONFIG node. 17 For a description of the MMSYS_CONFIG binding, see 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 19 for details. 20 21properties: 22 compatible: 23 oneOf: 24 - enum: 25 - mediatek,mt8173-disp-aal 26 - mediatek,mt8183-disp-aal 27 - items: 28 - enum: 29 - mediatek,mt2712-disp-aal 30 - mediatek,mt6795-disp-aal 31 - const: mediatek,mt8173-disp-aal 32 - items: 33 - enum: 34 - mediatek,mt8186-disp-aal 35 - mediatek,mt8188-disp-aal 36 - mediatek,mt8192-disp-aal 37 - mediatek,mt8195-disp-aal 38 - const: mediatek,mt8183-disp-aal 39 40 reg: 41 maxItems: 1 42 43 interrupts: 44 maxItems: 1 45 46 power-domains: 47 description: A phandle and PM domain specifier as defined by bindings of 48 the power controller specified by phandle. See 49 Documentation/devicetree/bindings/power/power-domain.yaml for details. 50 51 clocks: 52 items: 53 - description: AAL Clock 54 55 mediatek,gce-client-reg: 56 description: The register of client driver can be configured by gce with 57 4 arguments defined in this property, such as phandle of gce, subsys id, 58 register offset and size. Each GCE subsys id is mapping to a client 59 defined in the header include/dt-bindings/gce/<chip>-gce.h. 60 $ref: /schemas/types.yaml#/definitions/phandle-array 61 maxItems: 1 62 63required: 64 - compatible 65 - reg 66 - interrupts 67 - power-domains 68 - clocks 69 70additionalProperties: false 71 72examples: 73 - | 74 #include <dt-bindings/interrupt-controller/arm-gic.h> 75 #include <dt-bindings/clock/mt8173-clk.h> 76 #include <dt-bindings/power/mt8173-power.h> 77 #include <dt-bindings/gce/mt8173-gce.h> 78 79 soc { 80 #address-cells = <2>; 81 #size-cells = <2>; 82 83 aal@14015000 { 84 compatible = "mediatek,mt8173-disp-aal"; 85 reg = <0 0x14015000 0 0x1000>; 86 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>; 87 power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; 88 clocks = <&mmsys CLK_MM_DISP_AAL>; 89 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>; 90 }; 91 }; 92