1efdbd734SRob HerringFreescale i.MX DRM master device
2efdbd734SRob Herring================================
3efdbd734SRob Herring
4efdbd734SRob HerringThe freescale i.MX DRM master device is a virtual device needed to list all
5efdbd734SRob HerringIPU or other display interface nodes that comprise the graphics subsystem.
6efdbd734SRob Herring
7efdbd734SRob HerringRequired properties:
8efdbd734SRob Herring- compatible: Should be "fsl,imx-display-subsystem"
9efdbd734SRob Herring- ports: Should contain a list of phandles pointing to display interface ports
10efdbd734SRob Herring  of IPU devices
11efdbd734SRob Herring
12efdbd734SRob Herringexample:
13efdbd734SRob Herring
14efdbd734SRob Herringdisplay-subsystem {
15efdbd734SRob Herring	compatible = "fsl,display-subsystem";
16efdbd734SRob Herring	ports = <&ipu_di0>;
17efdbd734SRob Herring};
18efdbd734SRob Herring
19efdbd734SRob Herring
20efdbd734SRob HerringFreescale i.MX IPUv3
21efdbd734SRob Herring====================
22efdbd734SRob Herring
23efdbd734SRob HerringRequired properties:
24efdbd734SRob Herring- compatible: Should be "fsl,<chip>-ipu"
25efdbd734SRob Herring- reg: should be register base and length as documented in the
26efdbd734SRob Herring  datasheet
27efdbd734SRob Herring- interrupts: Should contain sync interrupt and error interrupt,
28efdbd734SRob Herring  in this order.
29efdbd734SRob Herring- resets: phandle pointing to the system reset controller and
30efdbd734SRob Herring          reset line index, see reset/fsl,imx-src.txt for details
31efdbd734SRob HerringOptional properties:
32efdbd734SRob Herring- port@[0-3]: Port nodes with endpoint definitions as defined in
33efdbd734SRob Herring  Documentation/devicetree/bindings/media/video-interfaces.txt.
34efdbd734SRob Herring  Ports 0 and 1 should correspond to CSI0 and CSI1,
35efdbd734SRob Herring  ports 2 and 3 should correspond to DI0 and DI1, respectively.
36efdbd734SRob Herring
37efdbd734SRob Herringexample:
38efdbd734SRob Herring
39efdbd734SRob Herringipu: ipu@18000000 {
40efdbd734SRob Herring	#address-cells = <1>;
41efdbd734SRob Herring	#size-cells = <0>;
42efdbd734SRob Herring	compatible = "fsl,imx53-ipu";
43efdbd734SRob Herring	reg = <0x18000000 0x080000000>;
44efdbd734SRob Herring	interrupts = <11 10>;
45efdbd734SRob Herring	resets = <&src 2>;
46efdbd734SRob Herring
47efdbd734SRob Herring	ipu_di0: port@2 {
48efdbd734SRob Herring		reg = <2>;
49efdbd734SRob Herring
50efdbd734SRob Herring		ipu_di0_disp0: endpoint {
51efdbd734SRob Herring			remote-endpoint = <&display_in>;
52efdbd734SRob Herring		};
53efdbd734SRob Herring	};
54efdbd734SRob Herring};
55efdbd734SRob Herring
56dcddda56SLucas StachFreescale i.MX PRE (Prefetch Resolve Engine)
57dcddda56SLucas Stach============================================
58dcddda56SLucas Stach
59dcddda56SLucas StachRequired properties:
60dcddda56SLucas Stach- compatible: should be "fsl,imx6qp-pre"
61dcddda56SLucas Stach- reg: should be register base and length as documented in the
62dcddda56SLucas Stach  datasheet
63dcddda56SLucas Stach- clocks : phandle to the PRE axi clock input, as described
64dcddda56SLucas Stach  in Documentation/devicetree/bindings/clock/clock-bindings.txt and
65dcddda56SLucas Stach  Documentation/devicetree/bindings/clock/imx6q-clock.txt.
66dcddda56SLucas Stach- clock-names: should be "axi"
67dcddda56SLucas Stach- interrupts: should contain the PRE interrupt
68dcddda56SLucas Stach- fsl,iram: phandle pointing to the mmio-sram device node, that should be
69dcddda56SLucas Stach  used for the PRE SRAM double buffer.
70dcddda56SLucas Stach
71dcddda56SLucas Stachexample:
72dcddda56SLucas Stach
73dcddda56SLucas Stachpre@21c8000 {
74dcddda56SLucas Stach	compatible = "fsl,imx6qp-pre";
75dcddda56SLucas Stach	reg = <0x021c8000 0x1000>;
76dcddda56SLucas Stach	interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
77dcddda56SLucas Stach	clocks = <&clks IMX6QDL_CLK_PRE0>;
78dcddda56SLucas Stach	clock-names = "axi";
79dcddda56SLucas Stach	fsl,iram = <&ocram2>;
80dcddda56SLucas Stach};
81dcddda56SLucas Stach
82efdbd734SRob HerringParallel display support
83efdbd734SRob Herring========================
84efdbd734SRob Herring
85efdbd734SRob HerringRequired properties:
86efdbd734SRob Herring- compatible: Should be "fsl,imx-parallel-display"
87efdbd734SRob HerringOptional properties:
88efdbd734SRob Herring- interface_pix_fmt: How this display is connected to the
89efdbd734SRob Herring  display interface. Currently supported types: "rgb24", "rgb565", "bgr666"
90efdbd734SRob Herring  and "lvds666".
91efdbd734SRob Herring- edid: verbatim EDID data block describing attached display.
92efdbd734SRob Herring- ddc: phandle describing the i2c bus handling the display data
93efdbd734SRob Herring  channel
94efdbd734SRob Herring- port@[0-1]: Port nodes with endpoint definitions as defined in
95efdbd734SRob Herring  Documentation/devicetree/bindings/media/video-interfaces.txt.
96efdbd734SRob Herring  Port 0 is the input port connected to the IPU display interface,
97efdbd734SRob Herring  port 1 is the output port connected to a panel.
98efdbd734SRob Herring
99efdbd734SRob Herringexample:
100efdbd734SRob Herring
101efdbd734SRob Herringdisplay@di0 {
102efdbd734SRob Herring	compatible = "fsl,imx-parallel-display";
103efdbd734SRob Herring	edid = [edid-data];
104efdbd734SRob Herring	interface-pix-fmt = "rgb24";
105efdbd734SRob Herring
106efdbd734SRob Herring	port@0 {
107efdbd734SRob Herring		reg = <0>;
108efdbd734SRob Herring
109efdbd734SRob Herring		display_in: endpoint {
110efdbd734SRob Herring			remote-endpoint = <&ipu_di0_disp0>;
111efdbd734SRob Herring		};
112efdbd734SRob Herring	};
113efdbd734SRob Herring
114efdbd734SRob Herring	port@1 {
115efdbd734SRob Herring		reg = <1>;
116efdbd734SRob Herring
117efdbd734SRob Herring		display_out: endpoint {
118efdbd734SRob Herring			remote-endpoint = <&panel_in>;
119efdbd734SRob Herring		};
120efdbd734SRob Herring	};
121efdbd734SRob Herring};
122efdbd734SRob Herring
123efdbd734SRob Herringpanel {
124efdbd734SRob Herring	...
125efdbd734SRob Herring
126efdbd734SRob Herring	port {
127efdbd734SRob Herring		panel_in: endpoint {
128efdbd734SRob Herring			remote-endpoint = <&display_out>;
129efdbd734SRob Herring		};
130efdbd734SRob Herring	};
131efdbd734SRob Herring};
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