1b935c3a2SLaurent Pinchart# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2b935c3a2SLaurent Pinchart%YAML 1.2 3b935c3a2SLaurent Pinchart--- 4b935c3a2SLaurent Pinchart$id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml# 5b935c3a2SLaurent Pinchart$schema: http://devicetree.org/meta-schemas/core.yaml# 6b935c3a2SLaurent Pinchart 7b935c3a2SLaurent Pincharttitle: Freescale i.MX6 DWC HDMI TX Encoder 8b935c3a2SLaurent Pinchart 9b935c3a2SLaurent Pinchartmaintainers: 10b935c3a2SLaurent Pinchart - Philipp Zabel <p.zabel@pengutronix.de> 11b935c3a2SLaurent Pinchart 12b935c3a2SLaurent Pinchartdescription: | 13b935c3a2SLaurent Pinchart The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 14b935c3a2SLaurent Pinchart with a companion PHY IP. 15b935c3a2SLaurent Pinchart 16b935c3a2SLaurent PinchartallOf: 17b935c3a2SLaurent Pinchart - $ref: ../bridge/synopsys,dw-hdmi.yaml# 18b935c3a2SLaurent Pinchart 19b935c3a2SLaurent Pinchartproperties: 20b935c3a2SLaurent Pinchart compatible: 21b935c3a2SLaurent Pinchart enum: 22b935c3a2SLaurent Pinchart - fsl,imx6dl-hdmi 23b935c3a2SLaurent Pinchart - fsl,imx6q-hdmi 24b935c3a2SLaurent Pinchart 25b935c3a2SLaurent Pinchart reg-io-width: 26b935c3a2SLaurent Pinchart const: 1 27b935c3a2SLaurent Pinchart 28b935c3a2SLaurent Pinchart clocks: 29b935c3a2SLaurent Pinchart maxItems: 2 30b935c3a2SLaurent Pinchart 31b935c3a2SLaurent Pinchart clock-names: 32b935c3a2SLaurent Pinchart maxItems: 2 33b935c3a2SLaurent Pinchart 34b935c3a2SLaurent Pinchart ddc-i2c-bus: 35b935c3a2SLaurent Pinchart $ref: /schemas/types.yaml#/definitions/phandle 36b935c3a2SLaurent Pinchart description: 37b935c3a2SLaurent Pinchart The HDMI DDC bus can be connected to either a system I2C master or the 38b935c3a2SLaurent Pinchart functionally-reduced I2C master contained in the DWC HDMI. When connected 39b935c3a2SLaurent Pinchart to a system I2C master this property contains a phandle to that I2C 40b935c3a2SLaurent Pinchart master controller. 41b935c3a2SLaurent Pinchart 42b935c3a2SLaurent Pinchart gpr: 43b935c3a2SLaurent Pinchart $ref: /schemas/types.yaml#/definitions/phandle 44b935c3a2SLaurent Pinchart description: 45b935c3a2SLaurent Pinchart phandle to the iomuxc-gpr region containing the HDMI multiplexer control 46b935c3a2SLaurent Pinchart register. 47b935c3a2SLaurent Pinchart 48b935c3a2SLaurent Pinchart ports: 49b935c3a2SLaurent Pinchart $ref: /schemas/graph.yaml#/properties/ports 50b935c3a2SLaurent Pinchart description: | 51b935c3a2SLaurent Pinchart This device has four video ports, corresponding to the four inputs of the 52b935c3a2SLaurent Pinchart HDMI multiplexer. Each port shall have a single endpoint. 53b935c3a2SLaurent Pinchart 54b935c3a2SLaurent Pinchart properties: 55b935c3a2SLaurent Pinchart port@0: 56b935c3a2SLaurent Pinchart $ref: /schemas/graph.yaml#/properties/port 57b935c3a2SLaurent Pinchart description: First input of the HDMI multiplexer 58b935c3a2SLaurent Pinchart 59b935c3a2SLaurent Pinchart port@1: 60b935c3a2SLaurent Pinchart $ref: /schemas/graph.yaml#/properties/port 61b935c3a2SLaurent Pinchart description: Second input of the HDMI multiplexer 62b935c3a2SLaurent Pinchart 63b935c3a2SLaurent Pinchart port@2: 64b935c3a2SLaurent Pinchart $ref: /schemas/graph.yaml#/properties/port 65b935c3a2SLaurent Pinchart description: Third input of the HDMI multiplexer 66b935c3a2SLaurent Pinchart 67b935c3a2SLaurent Pinchart port@3: 68b935c3a2SLaurent Pinchart $ref: /schemas/graph.yaml#/properties/port 69b935c3a2SLaurent Pinchart description: Fourth input of the HDMI multiplexer 70b935c3a2SLaurent Pinchart 71b935c3a2SLaurent Pinchart anyOf: 72b935c3a2SLaurent Pinchart - required: 73b935c3a2SLaurent Pinchart - port@0 74b935c3a2SLaurent Pinchart - required: 75b935c3a2SLaurent Pinchart - port@1 76b935c3a2SLaurent Pinchart - required: 77b935c3a2SLaurent Pinchart - port@2 78b935c3a2SLaurent Pinchart - required: 79b935c3a2SLaurent Pinchart - port@3 80b935c3a2SLaurent Pinchart 81b935c3a2SLaurent Pinchartrequired: 82b935c3a2SLaurent Pinchart - compatible 83b935c3a2SLaurent Pinchart - reg 84b935c3a2SLaurent Pinchart - clocks 85b935c3a2SLaurent Pinchart - clock-names 86b935c3a2SLaurent Pinchart - gpr 87b935c3a2SLaurent Pinchart - interrupts 88b935c3a2SLaurent Pinchart - ports 89b935c3a2SLaurent Pinchart 90*57db57aeSFabio EstevamunevaluatedProperties: false 91b935c3a2SLaurent Pinchart 92b935c3a2SLaurent Pinchartexamples: 93b935c3a2SLaurent Pinchart - | 94b935c3a2SLaurent Pinchart #include <dt-bindings/clock/imx6qdl-clock.h> 95b935c3a2SLaurent Pinchart 96b935c3a2SLaurent Pinchart hdmi: hdmi@120000 { 97b935c3a2SLaurent Pinchart reg = <0x00120000 0x9000>; 98b935c3a2SLaurent Pinchart interrupts = <0 115 0x04>; 99b935c3a2SLaurent Pinchart gpr = <&gpr>; 100b935c3a2SLaurent Pinchart clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>, 101b935c3a2SLaurent Pinchart <&clks IMX6QDL_CLK_HDMI_ISFR>; 102b935c3a2SLaurent Pinchart clock-names = "iahb", "isfr"; 103b935c3a2SLaurent Pinchart 104b935c3a2SLaurent Pinchart ports { 105b935c3a2SLaurent Pinchart #address-cells = <1>; 106b935c3a2SLaurent Pinchart #size-cells = <0>; 107b935c3a2SLaurent Pinchart 108b935c3a2SLaurent Pinchart port@0 { 109b935c3a2SLaurent Pinchart reg = <0>; 110b935c3a2SLaurent Pinchart 111b935c3a2SLaurent Pinchart hdmi_mux_0: endpoint { 112b935c3a2SLaurent Pinchart remote-endpoint = <&ipu1_di0_hdmi>; 113b935c3a2SLaurent Pinchart }; 114b935c3a2SLaurent Pinchart }; 115b935c3a2SLaurent Pinchart 116b935c3a2SLaurent Pinchart port@1 { 117b935c3a2SLaurent Pinchart reg = <1>; 118b935c3a2SLaurent Pinchart 119b935c3a2SLaurent Pinchart hdmi_mux_1: endpoint { 120b935c3a2SLaurent Pinchart remote-endpoint = <&ipu1_di1_hdmi>; 121b935c3a2SLaurent Pinchart }; 122b935c3a2SLaurent Pinchart }; 123b935c3a2SLaurent Pinchart }; 124b935c3a2SLaurent Pinchart }; 125b935c3a2SLaurent Pinchart 126b935c3a2SLaurent Pinchart... 127