145c415f6SPeter Ujfalusi# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
245c415f6SPeter Ujfalusi%YAML 1.2
345c415f6SPeter Ujfalusi---
445c415f6SPeter Ujfalusi$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358768.yaml#
545c415f6SPeter Ujfalusi$schema: http://devicetree.org/meta-schemas/core.yaml#
645c415f6SPeter Ujfalusi
745c415f6SPeter Ujfalusititle: Toschiba TC358768/TC358778 Parallel RGB to MIPI DSI bridge
845c415f6SPeter Ujfalusi
945c415f6SPeter Ujfalusimaintainers:
1045c415f6SPeter Ujfalusi  - Peter Ujfalusi <peter.ujfalusi@ti.com>
1145c415f6SPeter Ujfalusi
1245c415f6SPeter Ujfalusidescription: |
1345c415f6SPeter Ujfalusi  The TC358768/TC358778 is bridge device which converts RGB to DSI.
1445c415f6SPeter Ujfalusi
1545c415f6SPeter Ujfalusiproperties:
1645c415f6SPeter Ujfalusi  compatible:
1745c415f6SPeter Ujfalusi    enum:
1845c415f6SPeter Ujfalusi      - toshiba,tc358768
1945c415f6SPeter Ujfalusi      - toshiba,tc358778
2045c415f6SPeter Ujfalusi
2145c415f6SPeter Ujfalusi  reg:
2245c415f6SPeter Ujfalusi    maxItems: 1
2345c415f6SPeter Ujfalusi    description: base I2C address of the device
2445c415f6SPeter Ujfalusi
2545c415f6SPeter Ujfalusi  reset-gpios:
2645c415f6SPeter Ujfalusi    maxItems: 1
2745c415f6SPeter Ujfalusi    description: GPIO connected to active low RESX pin
2845c415f6SPeter Ujfalusi
2945c415f6SPeter Ujfalusi  vddc-supply:
3045c415f6SPeter Ujfalusi    description: Regulator for 1.2V internal core power.
3145c415f6SPeter Ujfalusi
3245c415f6SPeter Ujfalusi  vddmipi-supply:
3345c415f6SPeter Ujfalusi    description: Regulator for 1.2V for the MIPI.
3445c415f6SPeter Ujfalusi
3545c415f6SPeter Ujfalusi  vddio-supply:
3645c415f6SPeter Ujfalusi    description: Regulator for 1.8V - 3.3V IO power.
3745c415f6SPeter Ujfalusi
3845c415f6SPeter Ujfalusi  clocks:
3945c415f6SPeter Ujfalusi    maxItems: 1
4045c415f6SPeter Ujfalusi
4145c415f6SPeter Ujfalusi  clock-names:
4245c415f6SPeter Ujfalusi    const: refclk
4345c415f6SPeter Ujfalusi
4445c415f6SPeter Ujfalusi  ports:
45b6755423SRob Herring    $ref: /schemas/graph.yaml#/properties/ports
4645c415f6SPeter Ujfalusi
4745c415f6SPeter Ujfalusi    properties:
4845c415f6SPeter Ujfalusi      port@0:
49b6755423SRob Herring        $ref: /schemas/graph.yaml#/$defs/port-base
50b6755423SRob Herring        unevaluatedProperties: false
5145c415f6SPeter Ujfalusi        description: |
5245c415f6SPeter Ujfalusi          Video port for RGB input
5345c415f6SPeter Ujfalusi
5445c415f6SPeter Ujfalusi        properties:
5545c415f6SPeter Ujfalusi          endpoint:
56b6755423SRob Herring            $ref: /schemas/graph.yaml#/$defs/endpoint-base
57b6755423SRob Herring            unevaluatedProperties: false
5845c415f6SPeter Ujfalusi
5945c415f6SPeter Ujfalusi            properties:
6045c415f6SPeter Ujfalusi              data-lines:
6145c415f6SPeter Ujfalusi                enum: [ 16, 18, 24 ]
6245c415f6SPeter Ujfalusi
6345c415f6SPeter Ujfalusi      port@1:
64b6755423SRob Herring        $ref: /schemas/graph.yaml#/properties/port
6545c415f6SPeter Ujfalusi        description: |
6645c415f6SPeter Ujfalusi          Video port for DSI output (panel or connector).
6745c415f6SPeter Ujfalusi
6845c415f6SPeter Ujfalusi    required:
6945c415f6SPeter Ujfalusi      - port@0
7045c415f6SPeter Ujfalusi      - port@1
7145c415f6SPeter Ujfalusi
7245c415f6SPeter Ujfalusirequired:
7345c415f6SPeter Ujfalusi  - compatible
7445c415f6SPeter Ujfalusi  - reg
7545c415f6SPeter Ujfalusi  - vddc-supply
7645c415f6SPeter Ujfalusi  - vddmipi-supply
7745c415f6SPeter Ujfalusi  - vddio-supply
7845c415f6SPeter Ujfalusi  - ports
7945c415f6SPeter Ujfalusi
80*e044e3e6SDavid HeidelbergallOf:
81*e044e3e6SDavid Heidelberg  - $ref: ../dsi-controller.yaml#
82*e044e3e6SDavid Heidelberg
83*e044e3e6SDavid HeidelbergunevaluatedProperties: false
8445c415f6SPeter Ujfalusi
8545c415f6SPeter Ujfalusiexamples:
8645c415f6SPeter Ujfalusi  - |
8745c415f6SPeter Ujfalusi    #include <dt-bindings/gpio/gpio.h>
8845c415f6SPeter Ujfalusi
8945c415f6SPeter Ujfalusi    i2c1 {
9045c415f6SPeter Ujfalusi      #address-cells = <1>;
9145c415f6SPeter Ujfalusi      #size-cells = <0>;
9245c415f6SPeter Ujfalusi
93*e044e3e6SDavid Heidelberg      dsi_bridge: dsi@e {
9445c415f6SPeter Ujfalusi        compatible = "toshiba,tc358768";
9545c415f6SPeter Ujfalusi        reg = <0xe>;
9645c415f6SPeter Ujfalusi
9745c415f6SPeter Ujfalusi        clocks = <&tc358768_refclk>;
9845c415f6SPeter Ujfalusi        clock-names = "refclk";
9945c415f6SPeter Ujfalusi
10045c415f6SPeter Ujfalusi        reset-gpios = <&pcf_display_board 0 GPIO_ACTIVE_LOW>;
10145c415f6SPeter Ujfalusi
10245c415f6SPeter Ujfalusi        vddc-supply = <&v1_2d>;
10345c415f6SPeter Ujfalusi        vddmipi-supply = <&v1_2d>;
10445c415f6SPeter Ujfalusi        vddio-supply = <&v3_3d>;
10545c415f6SPeter Ujfalusi
10645c415f6SPeter Ujfalusi        dsi_bridge_ports: ports {
10745c415f6SPeter Ujfalusi          #address-cells = <1>;
10845c415f6SPeter Ujfalusi          #size-cells = <0>;
10945c415f6SPeter Ujfalusi
11045c415f6SPeter Ujfalusi          port@0 {
11145c415f6SPeter Ujfalusi            reg = <0>;
11245c415f6SPeter Ujfalusi            rgb_in: endpoint {
11345c415f6SPeter Ujfalusi              remote-endpoint = <&dpi_out>;
11445c415f6SPeter Ujfalusi              data-lines = <24>;
11545c415f6SPeter Ujfalusi            };
11645c415f6SPeter Ujfalusi          };
11745c415f6SPeter Ujfalusi
11845c415f6SPeter Ujfalusi          port@1 {
11945c415f6SPeter Ujfalusi            reg = <1>;
12045c415f6SPeter Ujfalusi            dsi_out: endpoint {
12145c415f6SPeter Ujfalusi              remote-endpoint = <&lcd_in>;
12245c415f6SPeter Ujfalusi            };
12345c415f6SPeter Ujfalusi          };
12445c415f6SPeter Ujfalusi        };
12545c415f6SPeter Ujfalusi      };
12645c415f6SPeter Ujfalusi    };
127