1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: SN65DSI86 DSI to eDP bridge chip
8
9maintainers:
10  - Sandeep Panda <spanda@codeaurora.org>
11
12description: |
13  The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
14  https://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
15
16properties:
17  compatible:
18    const: ti,sn65dsi86
19
20  reg:
21    const: 0x2d
22
23  enable-gpios:
24    maxItems: 1
25    description: GPIO specifier for bridge_en pin (active high).
26
27  suspend-gpios:
28    maxItems: 1
29    description: GPIO specifier for GPIO1 pin on bridge (active low).
30
31  no-hpd:
32    type: boolean
33    description:
34      Set if the HPD line on the bridge isn't hooked up to anything or is
35      otherwise unusable.
36
37  vccio-supply:
38    description: A 1.8V supply that powers the digital IOs.
39
40  vpll-supply:
41    description: A 1.8V supply that powers the DisplayPort PLL.
42
43  vcca-supply:
44    description: A 1.2V supply that powers the analog circuits.
45
46  vcc-supply:
47    description: A 1.2V supply that powers the digital core.
48
49  interrupts:
50    maxItems: 1
51
52  clocks:
53    maxItems: 1
54    description:
55      Clock specifier for input reference clock. The reference clock rate must
56      be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
57
58  clock-names:
59    const: refclk
60
61  gpio-controller: true
62  '#gpio-cells':
63    const: 2
64    description:
65      First cell is pin number, second cell is flags.  GPIO pin numbers are
66      1-based to match the datasheet.  See ../../gpio/gpio.txt for more
67      information.
68
69  '#pwm-cells':
70    const: 1
71    description: See ../../pwm/pwm.yaml for description of the cell formats.
72
73  ports:
74    $ref: /schemas/graph.yaml#/properties/ports
75
76    properties:
77      port@0:
78        $ref: /schemas/graph.yaml#/properties/port
79        description:
80          Video port for MIPI DSI input
81
82      port@1:
83        $ref: /schemas/graph.yaml#/$defs/port-base
84        unevaluatedProperties: false
85        description:
86          Video port for eDP output (panel or connector).
87
88        properties:
89          endpoint:
90            $ref: /schemas/graph.yaml#/$defs/endpoint-base
91            unevaluatedProperties: false
92
93            properties:
94              data-lanes:
95                oneOf:
96                  - minItems: 1
97                    maxItems: 1
98                    uniqueItems: true
99                    items:
100                      enum:
101                        - 0
102                        - 1
103                    description:
104                      If you have 1 logical lane the bridge supports routing
105                      to either port 0 or port 1.  Port 0 is suggested.
106                      See ../../media/video-interface.txt for details.
107
108                  - minItems: 2
109                    maxItems: 2
110                    uniqueItems: true
111                    items:
112                      enum:
113                        - 0
114                        - 1
115                    description:
116                      If you have 2 logical lanes the bridge supports
117                      reordering but only on physical ports 0 and 1.
118                      See ../../media/video-interface.txt for details.
119
120                  - minItems: 4
121                    maxItems: 4
122                    uniqueItems: true
123                    items:
124                      enum:
125                        - 0
126                        - 1
127                        - 2
128                        - 3
129                    description:
130                      If you have 4 logical lanes the bridge supports
131                      reordering in any way.
132                      See ../../media/video-interface.txt for details.
133
134              lane-polarities:
135                minItems: 1
136                maxItems: 4
137                items:
138                  enum:
139                    - 0
140                    - 1
141                description: See ../../media/video-interface.txt
142
143            dependencies:
144              lane-polarities: [data-lanes]
145
146    required:
147      - port@0
148      - port@1
149
150required:
151  - compatible
152  - reg
153  - enable-gpios
154  - vccio-supply
155  - vpll-supply
156  - vcca-supply
157  - vcc-supply
158  - ports
159
160additionalProperties: false
161
162examples:
163  - |
164    #include <dt-bindings/clock/qcom,rpmh.h>
165    #include <dt-bindings/gpio/gpio.h>
166    #include <dt-bindings/interrupt-controller/irq.h>
167
168    i2c {
169      #address-cells = <1>;
170      #size-cells = <0>;
171
172      bridge@2d {
173        compatible = "ti,sn65dsi86";
174        reg = <0x2d>;
175
176        interrupt-parent = <&tlmm>;
177        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
178
179        enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
180
181        vpll-supply = <&src_pp1800_s4a>;
182        vccio-supply = <&src_pp1800_s4a>;
183        vcca-supply = <&src_pp1200_l2a>;
184        vcc-supply = <&src_pp1200_l2a>;
185
186        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
187        clock-names = "refclk";
188
189        no-hpd;
190
191        ports {
192          #address-cells = <1>;
193          #size-cells = <0>;
194
195          port@0 {
196            reg = <0>;
197            endpoint {
198              remote-endpoint = <&dsi0_out>;
199            };
200          };
201
202          port@1 {
203            reg = <1>;
204            endpoint {
205              remote-endpoint = <&panel_in_edp>;
206            };
207          };
208        };
209      };
210    };
211  - |
212    #include <dt-bindings/clock/qcom,rpmh.h>
213    #include <dt-bindings/gpio/gpio.h>
214    #include <dt-bindings/interrupt-controller/irq.h>
215
216    i2c {
217      #address-cells = <1>;
218      #size-cells = <0>;
219
220      bridge@2d {
221        compatible = "ti,sn65dsi86";
222        reg = <0x2d>;
223
224        enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
225        suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
226
227        interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
228
229        vccio-supply = <&pm8916_l17>;
230        vcca-supply = <&pm8916_l6>;
231        vpll-supply = <&pm8916_l17>;
232        vcc-supply = <&pm8916_l6>;
233
234        clock-names = "refclk";
235        clocks = <&input_refclk>;
236
237        ports {
238          #address-cells = <1>;
239          #size-cells = <0>;
240
241          port@0 {
242            reg = <0>;
243
244            edp_bridge_in: endpoint {
245              remote-endpoint = <&dsi_out>;
246            };
247          };
248
249          port@1 {
250            reg = <1>;
251
252            edp_bridge_out: endpoint {
253              data-lanes = <2 1 3 0>;
254              lane-polarities = <0 1 0 1>;
255              remote-endpoint = <&edp_panel_in>;
256            };
257          };
258        };
259      };
260    };
261