1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: SN65DSI86 DSI to eDP bridge chip
8
9maintainers:
10  - Sandeep Panda <spanda@codeaurora.org>
11
12description: |
13  The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
14  http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf
15
16properties:
17  compatible:
18    const: ti,sn65dsi86
19
20  reg:
21    const: 0x2d
22
23  enable-gpios:
24    maxItems: 1
25    description: GPIO specifier for bridge_en pin (active high).
26
27  suspend-gpios:
28    maxItems: 1
29    description: GPIO specifier for GPIO1 pin on bridge (active low).
30
31  vccio-supply:
32    description: A 1.8V supply that powers the digital IOs.
33
34  vpll-supply:
35    description: A 1.8V supply that powers the DisplayPort PLL.
36
37  vcca-supply:
38    description: A 1.2V supply that powers the analog circuits.
39
40  vcc-supply:
41    description: A 1.2V supply that powers the digital core.
42
43  interrupts:
44    maxItems: 1
45
46  clocks:
47    maxItems: 1
48    description:
49      Clock specifier for input reference clock. The reference clock rate must
50      be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.
51
52  clock-names:
53    const: refclk
54
55  gpio-controller: true
56  '#gpio-cells':
57    const: 2
58    description:
59      First cell is pin number, second cell is flags.  GPIO pin numbers are
60      1-based to match the datasheet.  See ../../gpio/gpio.txt for more
61      information.
62
63  '#pwm-cells':
64    const: 1
65    description: See ../../pwm/pwm.yaml for description of the cell formats.
66
67  ports:
68    type: object
69    additionalProperties: false
70
71    properties:
72      "#address-cells":
73        const: 1
74
75      "#size-cells":
76        const: 0
77
78      port@0:
79        type: object
80        additionalProperties: false
81
82        description:
83          Video port for MIPI DSI input
84
85        properties:
86          reg:
87            const: 0
88
89          endpoint:
90            type: object
91            additionalProperties: false
92            properties:
93              remote-endpoint: true
94
95        required:
96          - reg
97
98      port@1:
99        type: object
100        additionalProperties: false
101
102        description:
103          Video port for eDP output (panel or connector).
104
105        properties:
106          reg:
107            const: 1
108
109          endpoint:
110            type: object
111            additionalProperties: false
112
113            properties:
114              remote-endpoint: true
115
116              data-lanes:
117                oneOf:
118                  - minItems: 1
119                    maxItems: 1
120                    uniqueItems: true
121                    items:
122                      enum:
123                        - 0
124                        - 1
125                    description:
126                      If you have 1 logical lane the bridge supports routing
127                      to either port 0 or port 1.  Port 0 is suggested.
128                      See ../../media/video-interface.txt for details.
129
130                  - minItems: 2
131                    maxItems: 2
132                    uniqueItems: true
133                    items:
134                      enum:
135                        - 0
136                        - 1
137                    description:
138                      If you have 2 logical lanes the bridge supports
139                      reordering but only on physical ports 0 and 1.
140                      See ../../media/video-interface.txt for details.
141
142                  - minItems: 4
143                    maxItems: 4
144                    uniqueItems: true
145                    items:
146                      enum:
147                        - 0
148                        - 1
149                        - 2
150                        - 3
151                    description:
152                      If you have 4 logical lanes the bridge supports
153                      reordering in any way.
154                      See ../../media/video-interface.txt for details.
155
156              lane-polarities:
157                minItems: 1
158                maxItems: 4
159                items:
160                  enum:
161                    - 0
162                    - 1
163                description: See ../../media/video-interface.txt
164
165            dependencies:
166              lane-polarities: [data-lanes]
167
168        required:
169          - reg
170
171    required:
172      - "#address-cells"
173      - "#size-cells"
174      - port@0
175      - port@1
176
177required:
178  - compatible
179  - reg
180  - enable-gpios
181  - vccio-supply
182  - vpll-supply
183  - vcca-supply
184  - vcc-supply
185  - ports
186
187additionalProperties: false
188
189examples:
190  - |
191    #include <dt-bindings/clock/qcom,rpmh.h>
192    #include <dt-bindings/gpio/gpio.h>
193    #include <dt-bindings/interrupt-controller/irq.h>
194
195    i2c {
196      #address-cells = <1>;
197      #size-cells = <0>;
198
199      bridge@2d {
200        compatible = "ti,sn65dsi86";
201        reg = <0x2d>;
202
203        interrupt-parent = <&tlmm>;
204        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
205
206        enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
207
208        vpll-supply = <&src_pp1800_s4a>;
209        vccio-supply = <&src_pp1800_s4a>;
210        vcca-supply = <&src_pp1200_l2a>;
211        vcc-supply = <&src_pp1200_l2a>;
212
213        clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
214        clock-names = "refclk";
215
216        ports {
217          #address-cells = <1>;
218          #size-cells = <0>;
219
220          port@0 {
221            reg = <0>;
222            endpoint {
223              remote-endpoint = <&dsi0_out>;
224            };
225          };
226
227          port@1 {
228            reg = <1>;
229            endpoint {
230              remote-endpoint = <&panel_in_edp>;
231            };
232          };
233        };
234      };
235    };
236  - |
237    #include <dt-bindings/clock/qcom,rpmh.h>
238    #include <dt-bindings/gpio/gpio.h>
239    #include <dt-bindings/interrupt-controller/irq.h>
240
241    i2c {
242      #address-cells = <1>;
243      #size-cells = <0>;
244
245      bridge@2d {
246        compatible = "ti,sn65dsi86";
247        reg = <0x2d>;
248
249        enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;
250        suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
251
252        interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;
253
254        vccio-supply = <&pm8916_l17>;
255        vcca-supply = <&pm8916_l6>;
256        vpll-supply = <&pm8916_l17>;
257        vcc-supply = <&pm8916_l6>;
258
259        clock-names = "refclk";
260        clocks = <&input_refclk>;
261
262        ports {
263          #address-cells = <1>;
264          #size-cells = <0>;
265
266          port@0 {
267            reg = <0>;
268
269            edp_bridge_in: endpoint {
270              remote-endpoint = <&dsi_out>;
271            };
272          };
273
274          port@1 {
275            reg = <1>;
276
277            edp_bridge_out: endpoint {
278              data-lanes = <2 1 3 0>;
279              lane-polarities = <0 1 0 1>;
280              remote-endpoint = <&edp_panel_in>;
281            };
282          };
283        };
284      };
285    };
286