1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare MIPI DSI host controller
8
9maintainers:
10  - Philippe CORNU <philippe.cornu@foss.st.com>
11
12description: |
13  This document defines device tree properties for the Synopsys DesignWare MIPI
14  DSI host controller. It doesn't constitue a device tree binding specification
15  by itself but is meant to be referenced by platform-specific device tree
16  bindings.
17
18  When referenced from platform device tree bindings the properties defined in
19  this document are defined as follows. The platform device tree bindings are
20  responsible for defining whether each property is required or optional.
21
22allOf:
23  - $ref: ../dsi-controller.yaml#
24
25properties:
26  reg:
27    maxItems: 1
28
29  clocks:
30    items:
31      - description: Module clock
32      - description: DSI bus clock for either AHB and APB
33      - description: Pixel clock for the DPI/RGB input
34    minItems: 2
35
36  clock-names:
37    items:
38      - const: ref
39      - const: pclk
40      - const: px_clk
41    minItems: 2
42
43  resets:
44    maxItems: 1
45
46  reset-names:
47    const: apb
48
49  ports:
50    $ref: /schemas/graph.yaml#/properties/ports
51
52    properties:
53      port@0:
54        $ref: /schemas/graph.yaml#/properties/port
55        description: Input node to receive pixel data.
56
57      port@1:
58        $ref: /schemas/graph.yaml#/properties/port
59        description: DSI output node to panel.
60
61    required:
62      - port@0
63      - port@1
64
65required:
66  - clock-names
67  - clocks
68  - ports
69  - reg
70
71additionalProperties: true
72