1*f06e4c9eSGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*f06e4c9eSGeert Uytterhoeven%YAML 1.2
3*f06e4c9eSGeert Uytterhoeven---
4*f06e4c9eSGeert Uytterhoeven$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml#
5*f06e4c9eSGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml#
6*f06e4c9eSGeert Uytterhoeven
7*f06e4c9eSGeert Uytterhoeventitle: Silicon Image sii902x HDMI bridge
8*f06e4c9eSGeert Uytterhoeven
9*f06e4c9eSGeert Uytterhoevenmaintainers:
10*f06e4c9eSGeert Uytterhoeven  - Boris Brezillon <bbrezillon@kernel.org>
11*f06e4c9eSGeert Uytterhoeven
12*f06e4c9eSGeert Uytterhoevenproperties:
13*f06e4c9eSGeert Uytterhoeven  compatible:
14*f06e4c9eSGeert Uytterhoeven    oneOf:
15*f06e4c9eSGeert Uytterhoeven      - items:
16*f06e4c9eSGeert Uytterhoeven          - enum:
17*f06e4c9eSGeert Uytterhoeven              - sil,sii9022-cpi # CEC Programming Interface
18*f06e4c9eSGeert Uytterhoeven              - sil,sii9022-tpi # Transmitter Programming Interface
19*f06e4c9eSGeert Uytterhoeven          - const: sil,sii9022
20*f06e4c9eSGeert Uytterhoeven      - const: sil,sii9022
21*f06e4c9eSGeert Uytterhoeven
22*f06e4c9eSGeert Uytterhoeven  reg:
23*f06e4c9eSGeert Uytterhoeven    maxItems: 1
24*f06e4c9eSGeert Uytterhoeven
25*f06e4c9eSGeert Uytterhoeven  interrupts:
26*f06e4c9eSGeert Uytterhoeven    maxItems: 1
27*f06e4c9eSGeert Uytterhoeven    description: Interrupt line used to inform the host about hotplug events.
28*f06e4c9eSGeert Uytterhoeven
29*f06e4c9eSGeert Uytterhoeven  reset-gpios:
30*f06e4c9eSGeert Uytterhoeven    maxItems: 1
31*f06e4c9eSGeert Uytterhoeven
32*f06e4c9eSGeert Uytterhoeven  iovcc-supply:
33*f06e4c9eSGeert Uytterhoeven    description: I/O Supply Voltage (1.8V or 3.3V)
34*f06e4c9eSGeert Uytterhoeven
35*f06e4c9eSGeert Uytterhoeven  cvcc12-supply:
36*f06e4c9eSGeert Uytterhoeven    description: Digital Core Supply Voltage (1.2V)
37*f06e4c9eSGeert Uytterhoeven
38*f06e4c9eSGeert Uytterhoeven  '#sound-dai-cells':
39*f06e4c9eSGeert Uytterhoeven    enum: [ 0, 1 ]
40*f06e4c9eSGeert Uytterhoeven    description: |
41*f06e4c9eSGeert Uytterhoeven      <0> if only I2S or S/PDIF pin is wired,
42*f06e4c9eSGeert Uytterhoeven      <1> if both are wired.
43*f06e4c9eSGeert Uytterhoeven      HDMI audio is configured only if this property is found.
44*f06e4c9eSGeert Uytterhoeven      If HDMI audio is configured, the sii902x device becomes an I2S and/or
45*f06e4c9eSGeert Uytterhoeven      S/PDIF audio codec component (e.g. a digital audio sink), that can be
46*f06e4c9eSGeert Uytterhoeven      used in configuring full audio devices with simple-card or
47*f06e4c9eSGeert Uytterhoeven      audio-graph-card bindings. See their binding documents on how to describe
48*f06e4c9eSGeert Uytterhoeven      the way the
49*f06e4c9eSGeert Uytterhoeven      sii902x device is connected to the rest of the audio system:
50*f06e4c9eSGeert Uytterhoeven      Documentation/devicetree/bindings/sound/simple-card.yaml
51*f06e4c9eSGeert Uytterhoeven      Documentation/devicetree/bindings/sound/audio-graph-card.yaml
52*f06e4c9eSGeert Uytterhoeven      Note: In case of the audio-graph-card binding the used port index should
53*f06e4c9eSGeert Uytterhoeven      be 3.
54*f06e4c9eSGeert Uytterhoeven
55*f06e4c9eSGeert Uytterhoeven  sil,i2s-data-lanes:
56*f06e4c9eSGeert Uytterhoeven    $ref: /schemas/types.yaml#/definitions/uint32-array
57*f06e4c9eSGeert Uytterhoeven    minItems: 1
58*f06e4c9eSGeert Uytterhoeven    maxItems: 4
59*f06e4c9eSGeert Uytterhoeven    uniqueItems: true
60*f06e4c9eSGeert Uytterhoeven    items:
61*f06e4c9eSGeert Uytterhoeven      enum: [ 0, 1, 2, 3 ]
62*f06e4c9eSGeert Uytterhoeven    description:
63*f06e4c9eSGeert Uytterhoeven      Each integer indicates which I2S pin is connected to which audio FIFO.
64*f06e4c9eSGeert Uytterhoeven      The first integer selects the I2S audio pin for the first audio FIFO#0
65*f06e4c9eSGeert Uytterhoeven      (HDMI channels 1&2), the second for FIFO#1 (HDMI channels 3&4), and so
66*f06e4c9eSGeert Uytterhoeven      on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be
67*f06e4c9eSGeert Uytterhoeven      connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be
68*f06e4c9eSGeert Uytterhoeven      mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The
69*f06e4c9eSGeert Uytterhoeven      default value is <0>, describing SD0 pin being routed to HDMI audio
70*f06e4c9eSGeert Uytterhoeven      FIFO#0.
71*f06e4c9eSGeert Uytterhoeven
72*f06e4c9eSGeert Uytterhoeven  clocks:
73*f06e4c9eSGeert Uytterhoeven    maxItems: 1
74*f06e4c9eSGeert Uytterhoeven    description: MCLK input. MCLK can be used to produce HDMI audio CTS values.
75*f06e4c9eSGeert Uytterhoeven
76*f06e4c9eSGeert Uytterhoeven  clock-names:
77*f06e4c9eSGeert Uytterhoeven    const: mclk
78*f06e4c9eSGeert Uytterhoeven
79*f06e4c9eSGeert Uytterhoeven  ports:
80*f06e4c9eSGeert Uytterhoeven    $ref: /schemas/graph.yaml#/properties/ports
81*f06e4c9eSGeert Uytterhoeven
82*f06e4c9eSGeert Uytterhoeven    properties:
83*f06e4c9eSGeert Uytterhoeven      port@0:
84*f06e4c9eSGeert Uytterhoeven        $ref: /schemas/graph.yaml#/properties/port
85*f06e4c9eSGeert Uytterhoeven        description: Parallel RGB input port
86*f06e4c9eSGeert Uytterhoeven
87*f06e4c9eSGeert Uytterhoeven      port@1:
88*f06e4c9eSGeert Uytterhoeven        $ref: /schemas/graph.yaml#/properties/port
89*f06e4c9eSGeert Uytterhoeven        description: HDMI output port
90*f06e4c9eSGeert Uytterhoeven
91*f06e4c9eSGeert Uytterhoeven      port@3:
92*f06e4c9eSGeert Uytterhoeven        $ref: /schemas/graph.yaml#/properties/port
93*f06e4c9eSGeert Uytterhoeven        description: Sound input port
94*f06e4c9eSGeert Uytterhoeven
95*f06e4c9eSGeert Uytterhoevenrequired:
96*f06e4c9eSGeert Uytterhoeven  - compatible
97*f06e4c9eSGeert Uytterhoeven  - reg
98*f06e4c9eSGeert Uytterhoeven
99*f06e4c9eSGeert UytterhoevenadditionalProperties: false
100*f06e4c9eSGeert Uytterhoeven
101*f06e4c9eSGeert Uytterhoevenexamples:
102*f06e4c9eSGeert Uytterhoeven  - |
103*f06e4c9eSGeert Uytterhoeven    i2c {
104*f06e4c9eSGeert Uytterhoeven        #address-cells = <1>;
105*f06e4c9eSGeert Uytterhoeven        #size-cells = <0>;
106*f06e4c9eSGeert Uytterhoeven
107*f06e4c9eSGeert Uytterhoeven        hdmi-bridge@39 {
108*f06e4c9eSGeert Uytterhoeven            compatible = "sil,sii9022";
109*f06e4c9eSGeert Uytterhoeven            reg = <0x39>;
110*f06e4c9eSGeert Uytterhoeven            reset-gpios = <&pioA 1 0>;
111*f06e4c9eSGeert Uytterhoeven            iovcc-supply = <&v3v3_hdmi>;
112*f06e4c9eSGeert Uytterhoeven            cvcc12-supply = <&v1v2_hdmi>;
113*f06e4c9eSGeert Uytterhoeven
114*f06e4c9eSGeert Uytterhoeven            #sound-dai-cells = <0>;
115*f06e4c9eSGeert Uytterhoeven            sil,i2s-data-lanes = < 0 1 2 >;
116*f06e4c9eSGeert Uytterhoeven            clocks = <&mclk>;
117*f06e4c9eSGeert Uytterhoeven            clock-names = "mclk";
118*f06e4c9eSGeert Uytterhoeven
119*f06e4c9eSGeert Uytterhoeven            ports {
120*f06e4c9eSGeert Uytterhoeven                #address-cells = <1>;
121*f06e4c9eSGeert Uytterhoeven                #size-cells = <0>;
122*f06e4c9eSGeert Uytterhoeven
123*f06e4c9eSGeert Uytterhoeven                port@0 {
124*f06e4c9eSGeert Uytterhoeven                    reg = <0>;
125*f06e4c9eSGeert Uytterhoeven                    bridge_in: endpoint {
126*f06e4c9eSGeert Uytterhoeven                        remote-endpoint = <&dc_out>;
127*f06e4c9eSGeert Uytterhoeven                    };
128*f06e4c9eSGeert Uytterhoeven                };
129*f06e4c9eSGeert Uytterhoeven            };
130*f06e4c9eSGeert Uytterhoeven        };
131*f06e4c9eSGeert Uytterhoeven    };
132