11a0548ceSLaurent Pinchart# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
21a0548ceSLaurent Pinchart%YAML 1.2
31a0548ceSLaurent Pinchart---
41a0548ceSLaurent Pinchart$id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml#
51a0548ceSLaurent Pinchart$schema: http://devicetree.org/meta-schemas/core.yaml#
61a0548ceSLaurent Pinchart
71a0548ceSLaurent Pincharttitle: Renesas R-Car MIPI DSI/CSI-2 Encoder
81a0548ceSLaurent Pinchart
91a0548ceSLaurent Pinchartmaintainers:
101a0548ceSLaurent Pinchart  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
111a0548ceSLaurent Pinchart
121a0548ceSLaurent Pinchartdescription: |
131a0548ceSLaurent Pinchart  This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas
14*8ffd3d5eSTomi Valkeinen  R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up
151a0548ceSLaurent Pinchart  to four data lanes.
161a0548ceSLaurent Pinchart
171a0548ceSLaurent Pinchartproperties:
181a0548ceSLaurent Pinchart  compatible:
191a0548ceSLaurent Pinchart    enum:
201a0548ceSLaurent Pinchart      - renesas,r8a779a0-dsi-csi2-tx    # for V3U
21*8ffd3d5eSTomi Valkeinen      - renesas,r8a779g0-dsi-csi2-tx    # for V4H
221a0548ceSLaurent Pinchart
231a0548ceSLaurent Pinchart  reg:
241a0548ceSLaurent Pinchart    maxItems: 1
251a0548ceSLaurent Pinchart
261a0548ceSLaurent Pinchart  clocks:
271a0548ceSLaurent Pinchart    items:
281a0548ceSLaurent Pinchart      - description: Functional clock
291a0548ceSLaurent Pinchart      - description: DSI (and CSI-2) functional clock
301a0548ceSLaurent Pinchart      - description: PLL reference clock
311a0548ceSLaurent Pinchart
321a0548ceSLaurent Pinchart  clock-names:
331a0548ceSLaurent Pinchart    items:
341a0548ceSLaurent Pinchart      - const: fck
351a0548ceSLaurent Pinchart      - const: dsi
361a0548ceSLaurent Pinchart      - const: pll
371a0548ceSLaurent Pinchart
381a0548ceSLaurent Pinchart  power-domains:
391a0548ceSLaurent Pinchart    maxItems: 1
401a0548ceSLaurent Pinchart
411a0548ceSLaurent Pinchart  resets:
421a0548ceSLaurent Pinchart    maxItems: 1
431a0548ceSLaurent Pinchart
441a0548ceSLaurent Pinchart  ports:
451a0548ceSLaurent Pinchart    $ref: /schemas/graph.yaml#/properties/ports
461a0548ceSLaurent Pinchart
471a0548ceSLaurent Pinchart    properties:
481a0548ceSLaurent Pinchart      port@0:
491a0548ceSLaurent Pinchart        $ref: /schemas/graph.yaml#/properties/port
501a0548ceSLaurent Pinchart        description: Parallel input port
511a0548ceSLaurent Pinchart
521a0548ceSLaurent Pinchart      port@1:
531a0548ceSLaurent Pinchart        $ref: /schemas/graph.yaml#/$defs/port-base
541a0548ceSLaurent Pinchart        unevaluatedProperties: false
551a0548ceSLaurent Pinchart        description: DSI/CSI-2 output port
561a0548ceSLaurent Pinchart
571a0548ceSLaurent Pinchart        properties:
581a0548ceSLaurent Pinchart          endpoint:
591a0548ceSLaurent Pinchart            $ref: /schemas/media/video-interfaces.yaml#
601a0548ceSLaurent Pinchart            unevaluatedProperties: false
611a0548ceSLaurent Pinchart
621a0548ceSLaurent Pinchart            properties:
631a0548ceSLaurent Pinchart              data-lanes:
641a0548ceSLaurent Pinchart                minItems: 1
651a0548ceSLaurent Pinchart                maxItems: 4
661a0548ceSLaurent Pinchart
671a0548ceSLaurent Pinchart            required:
681a0548ceSLaurent Pinchart              - data-lanes
691a0548ceSLaurent Pinchart
701a0548ceSLaurent Pinchart    required:
711a0548ceSLaurent Pinchart      - port@0
721a0548ceSLaurent Pinchart      - port@1
731a0548ceSLaurent Pinchart
741a0548ceSLaurent Pinchartrequired:
751a0548ceSLaurent Pinchart  - compatible
761a0548ceSLaurent Pinchart  - reg
771a0548ceSLaurent Pinchart  - clocks
781a0548ceSLaurent Pinchart  - power-domains
791a0548ceSLaurent Pinchart  - resets
801a0548ceSLaurent Pinchart  - ports
811a0548ceSLaurent Pinchart
821a0548ceSLaurent PinchartadditionalProperties: false
831a0548ceSLaurent Pinchart
841a0548ceSLaurent Pinchartexamples:
851a0548ceSLaurent Pinchart  - |
861a0548ceSLaurent Pinchart    #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
871a0548ceSLaurent Pinchart    #include <dt-bindings/power/r8a779a0-sysc.h>
881a0548ceSLaurent Pinchart
891a0548ceSLaurent Pinchart    dsi0: dsi-encoder@fed80000 {
901a0548ceSLaurent Pinchart        compatible = "renesas,r8a779a0-dsi-csi2-tx";
911a0548ceSLaurent Pinchart        reg = <0xfed80000 0x10000>;
921a0548ceSLaurent Pinchart        power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
931a0548ceSLaurent Pinchart        clocks = <&cpg CPG_MOD 415>,
941a0548ceSLaurent Pinchart                 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
951a0548ceSLaurent Pinchart                 <&cpg CPG_CORE R8A779A0_CLK_CP>;
961a0548ceSLaurent Pinchart        clock-names = "fck", "dsi", "pll";
971a0548ceSLaurent Pinchart        resets = <&cpg 415>;
981a0548ceSLaurent Pinchart
991a0548ceSLaurent Pinchart        ports {
1001a0548ceSLaurent Pinchart            #address-cells = <1>;
1011a0548ceSLaurent Pinchart            #size-cells = <0>;
1021a0548ceSLaurent Pinchart
1031a0548ceSLaurent Pinchart            port@0 {
1041a0548ceSLaurent Pinchart                reg = <0>;
1051a0548ceSLaurent Pinchart                dsi0_in: endpoint {
1061a0548ceSLaurent Pinchart                    remote-endpoint = <&du_out_dsi0>;
1071a0548ceSLaurent Pinchart                };
1081a0548ceSLaurent Pinchart            };
1091a0548ceSLaurent Pinchart
1101a0548ceSLaurent Pinchart            port@1 {
1111a0548ceSLaurent Pinchart                reg = <1>;
1121a0548ceSLaurent Pinchart                dsi0_out: endpoint {
1131a0548ceSLaurent Pinchart                    data-lanes = <1 2>;
1141a0548ceSLaurent Pinchart                    remote-endpoint = <&sn65dsi86_in>;
1151a0548ceSLaurent Pinchart                };
1161a0548ceSLaurent Pinchart            };
1171a0548ceSLaurent Pinchart        };
1181a0548ceSLaurent Pinchart    };
1191a0548ceSLaurent Pinchart...
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