1*a7e73070SLubomir Rintel# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*a7e73070SLubomir Rintel# Copyright (C) 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
3*a7e73070SLubomir Rintel%YAML 1.2
4*a7e73070SLubomir Rintel---
5*a7e73070SLubomir Rintel$id: http://devicetree.org/schemas/display/bridge/chrontel,ch7033.yaml#
6*a7e73070SLubomir Rintel$schema: http://devicetree.org/meta-schemas/core.yaml#
7*a7e73070SLubomir Rintel
8*a7e73070SLubomir Rinteltitle: Chrontel CH7033 Video Encoder Device Tree Bindings
9*a7e73070SLubomir Rintel
10*a7e73070SLubomir Rintelmaintainers:
11*a7e73070SLubomir Rintel  - Lubomir Rintel <lkundrak@v3.sk>
12*a7e73070SLubomir Rintel
13*a7e73070SLubomir Rintelproperties:
14*a7e73070SLubomir Rintel  compatible:
15*a7e73070SLubomir Rintel    const: chrontel,ch7033
16*a7e73070SLubomir Rintel
17*a7e73070SLubomir Rintel  reg:
18*a7e73070SLubomir Rintel    maxItems: 1
19*a7e73070SLubomir Rintel    description: I2C address of the device
20*a7e73070SLubomir Rintel
21*a7e73070SLubomir Rintel  ports:
22*a7e73070SLubomir Rintel    type: object
23*a7e73070SLubomir Rintel
24*a7e73070SLubomir Rintel    properties:
25*a7e73070SLubomir Rintel      port@0:
26*a7e73070SLubomir Rintel        type: object
27*a7e73070SLubomir Rintel        description: |
28*a7e73070SLubomir Rintel          Video port for RGB input.
29*a7e73070SLubomir Rintel
30*a7e73070SLubomir Rintel      port@1:
31*a7e73070SLubomir Rintel        type: object
32*a7e73070SLubomir Rintel        description: |
33*a7e73070SLubomir Rintel          DVI port, should be connected to a node compatible with the
34*a7e73070SLubomir Rintel          dvi-connector binding.
35*a7e73070SLubomir Rintel
36*a7e73070SLubomir Rintel    required:
37*a7e73070SLubomir Rintel      - port@0
38*a7e73070SLubomir Rintel      - port@1
39*a7e73070SLubomir Rintel
40*a7e73070SLubomir Rintelrequired:
41*a7e73070SLubomir Rintel  - compatible
42*a7e73070SLubomir Rintel  - reg
43*a7e73070SLubomir Rintel  - ports
44*a7e73070SLubomir Rintel
45*a7e73070SLubomir RinteladditionalProperties: false
46*a7e73070SLubomir Rintel
47*a7e73070SLubomir Rintelexamples:
48*a7e73070SLubomir Rintel  - |
49*a7e73070SLubomir Rintel    i2c {
50*a7e73070SLubomir Rintel        #address-cells = <1>;
51*a7e73070SLubomir Rintel        #size-cells = <0>;
52*a7e73070SLubomir Rintel
53*a7e73070SLubomir Rintel        vga-dvi-encoder@76 {
54*a7e73070SLubomir Rintel            compatible = "chrontel,ch7033";
55*a7e73070SLubomir Rintel            reg = <0x76>;
56*a7e73070SLubomir Rintel
57*a7e73070SLubomir Rintel            ports {
58*a7e73070SLubomir Rintel                #address-cells = <1>;
59*a7e73070SLubomir Rintel                #size-cells = <0>;
60*a7e73070SLubomir Rintel
61*a7e73070SLubomir Rintel                port@0 {
62*a7e73070SLubomir Rintel                    reg = <0>;
63*a7e73070SLubomir Rintel                    endpoint {
64*a7e73070SLubomir Rintel                        remote-endpoint = <&lcd0_rgb_out>;
65*a7e73070SLubomir Rintel                    };
66*a7e73070SLubomir Rintel                };
67*a7e73070SLubomir Rintel
68*a7e73070SLubomir Rintel                port@1 {
69*a7e73070SLubomir Rintel                    reg = <1>;
70*a7e73070SLubomir Rintel                    endpoint {
71*a7e73070SLubomir Rintel                        remote-endpoint = <&dvi_in>;
72*a7e73070SLubomir Rintel                    };
73*a7e73070SLubomir Rintel                };
74*a7e73070SLubomir Rintel
75*a7e73070SLubomir Rintel            };
76*a7e73070SLubomir Rintel        };
77*a7e73070SLubomir Rintel    };
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