1a42e37dbSJagan Teki# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2a42e37dbSJagan Teki%YAML 1.2 3a42e37dbSJagan Teki--- 4a42e37dbSJagan Teki$id: http://devicetree.org/schemas/display/bridge/chipone,icn6211.yaml# 5a42e37dbSJagan Teki$schema: http://devicetree.org/meta-schemas/core.yaml# 6a42e37dbSJagan Teki 7a42e37dbSJagan Tekititle: Chipone ICN6211 MIPI-DSI to RGB Converter bridge 8a42e37dbSJagan Teki 9a42e37dbSJagan Tekimaintainers: 10a42e37dbSJagan Teki - Jagan Teki <jagan@amarulasolutions.com> 11a42e37dbSJagan Teki 12a42e37dbSJagan Tekidescription: | 13a42e37dbSJagan Teki ICN6211 is MIPI-DSI to RGB Converter bridge from chipone. 14a42e37dbSJagan Teki 15a42e37dbSJagan Teki It has a flexible configuration of MIPI DSI signal input and 16a42e37dbSJagan Teki produce RGB565, RGB666, RGB888 output format. 17a42e37dbSJagan Teki 18a42e37dbSJagan Tekiproperties: 19a42e37dbSJagan Teki compatible: 20a42e37dbSJagan Teki enum: 21a42e37dbSJagan Teki - chipone,icn6211 22a42e37dbSJagan Teki 23a42e37dbSJagan Teki reg: 24a42e37dbSJagan Teki maxItems: 1 25a42e37dbSJagan Teki description: virtual channel number of a DSI peripheral 26a42e37dbSJagan Teki 27*a2d6447aSMarek Vasut clock-names: 28*a2d6447aSMarek Vasut const: refclk 29*a2d6447aSMarek Vasut 30*a2d6447aSMarek Vasut clocks: 31*a2d6447aSMarek Vasut maxItems: 1 32*a2d6447aSMarek Vasut description: | 33*a2d6447aSMarek Vasut Optional external clock connected to REF_CLK input. 34*a2d6447aSMarek Vasut The clock rate must be in 10..154 MHz range. 35*a2d6447aSMarek Vasut 36a42e37dbSJagan Teki enable-gpios: 37a42e37dbSJagan Teki description: Bridge EN pin, chip is reset when EN is low. 38a42e37dbSJagan Teki 39a42e37dbSJagan Teki vdd1-supply: 40a42e37dbSJagan Teki description: A 1.8V/2.5V/3.3V supply that power the MIPI RX. 41a42e37dbSJagan Teki 42a42e37dbSJagan Teki vdd2-supply: 43a42e37dbSJagan Teki description: A 1.8V/2.5V/3.3V supply that power the PLL. 44a42e37dbSJagan Teki 45a42e37dbSJagan Teki vdd3-supply: 46a42e37dbSJagan Teki description: A 1.8V/2.5V/3.3V supply that power the RGB output. 47a42e37dbSJagan Teki 48a42e37dbSJagan Teki ports: 49a42e37dbSJagan Teki $ref: /schemas/graph.yaml#/properties/ports 50a42e37dbSJagan Teki 51a42e37dbSJagan Teki properties: 52a42e37dbSJagan Teki port@0: 5329d699a4SMarek Vasut $ref: /schemas/graph.yaml#/$defs/port-base 5429d699a4SMarek Vasut unevaluatedProperties: false 55a42e37dbSJagan Teki description: 56a42e37dbSJagan Teki Video port for MIPI DSI input 57a42e37dbSJagan Teki 5829d699a4SMarek Vasut properties: 5929d699a4SMarek Vasut endpoint: 6029d699a4SMarek Vasut $ref: /schemas/media/video-interfaces.yaml# 6129d699a4SMarek Vasut unevaluatedProperties: false 6229d699a4SMarek Vasut 6329d699a4SMarek Vasut properties: 6429d699a4SMarek Vasut data-lanes: 6529d699a4SMarek Vasut description: array of physical DSI data lane indexes. 6629d699a4SMarek Vasut minItems: 1 6729d699a4SMarek Vasut items: 6829d699a4SMarek Vasut - const: 1 6929d699a4SMarek Vasut - const: 2 7029d699a4SMarek Vasut - const: 3 7129d699a4SMarek Vasut - const: 4 7229d699a4SMarek Vasut 73a42e37dbSJagan Teki port@1: 74a42e37dbSJagan Teki $ref: /schemas/graph.yaml#/properties/port 75a42e37dbSJagan Teki description: 76a42e37dbSJagan Teki Video port for MIPI DPI output (panel or connector). 77a42e37dbSJagan Teki 78a42e37dbSJagan Teki required: 79a42e37dbSJagan Teki - port@1 80a42e37dbSJagan Teki 81a42e37dbSJagan Tekirequired: 82a42e37dbSJagan Teki - compatible 83a42e37dbSJagan Teki - reg 84a42e37dbSJagan Teki - enable-gpios 85a42e37dbSJagan Teki - ports 86a42e37dbSJagan Teki 87a42e37dbSJagan TekiadditionalProperties: false 88a42e37dbSJagan Teki 89a42e37dbSJagan Tekiexamples: 90a42e37dbSJagan Teki - | 91a42e37dbSJagan Teki #include <dt-bindings/gpio/gpio.h> 92a42e37dbSJagan Teki 93a42e37dbSJagan Teki dsi { 94a42e37dbSJagan Teki #address-cells = <1>; 95a42e37dbSJagan Teki #size-cells = <0>; 96a42e37dbSJagan Teki 97a42e37dbSJagan Teki bridge@0 { 98a42e37dbSJagan Teki compatible = "chipone,icn6211"; 99a42e37dbSJagan Teki reg = <0>; 100a42e37dbSJagan Teki enable-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* LCD-RST: PL5 */ 101a42e37dbSJagan Teki 102a42e37dbSJagan Teki ports { 103a42e37dbSJagan Teki #address-cells = <1>; 104a42e37dbSJagan Teki #size-cells = <0>; 105a42e37dbSJagan Teki 106a42e37dbSJagan Teki port@0 { 107a42e37dbSJagan Teki reg = <0>; 108a42e37dbSJagan Teki 109a42e37dbSJagan Teki bridge_in_dsi: endpoint { 110a42e37dbSJagan Teki remote-endpoint = <&dsi_out_bridge>; 111a42e37dbSJagan Teki }; 112a42e37dbSJagan Teki }; 113a42e37dbSJagan Teki 114a42e37dbSJagan Teki port@1 { 115a42e37dbSJagan Teki reg = <1>; 116a42e37dbSJagan Teki 117a42e37dbSJagan Teki bridge_out_panel: endpoint { 118a42e37dbSJagan Teki remote-endpoint = <&panel_out_bridge>; 119a42e37dbSJagan Teki }; 120a42e37dbSJagan Teki }; 121a42e37dbSJagan Teki }; 122a42e37dbSJagan Teki }; 123a42e37dbSJagan Teki }; 124