1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Cadence MHDP8546 bridge 8 9maintainers: 10 - Swapnil Jakhade <sjakhade@cadence.com> 11 - Yuti Amonkar <yamonkar@cadence.com> 12 13properties: 14 compatible: 15 enum: 16 - cdns,mhdp8546 17 - ti,j721e-mhdp8546 18 19 reg: 20 minItems: 1 21 maxItems: 3 22 items: 23 - description: 24 Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). 25 The AUX and PMA registers are not part of this range, they are instead 26 included in the associated PHY. 27 - description: 28 Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. 29 - description: 30 Register block of mhdptx sapb registers. 31 32 reg-names: 33 minItems: 1 34 maxItems: 3 35 items: 36 - const: mhdptx 37 - const: j721e-intg 38 - const: mhdptx-sapb 39 40 clocks: 41 maxItems: 1 42 description: 43 DP bridge clock, used by the IP to know how to translate a number of 44 clock cycles into a time (which is used to comply with DP standard timings 45 and delays). 46 47 phys: 48 maxItems: 1 49 description: 50 phandle to the DisplayPort PHY. 51 52 phy-names: 53 items: 54 - const: dpphy 55 56 power-domains: 57 maxItems: 1 58 59 interrupts: 60 maxItems: 1 61 62 ports: 63 $ref: /schemas/graph.yaml#/properties/ports 64 65 properties: 66 port@0: 67 $ref: /schemas/graph.yaml#/properties/port 68 description: 69 First input port representing the DP bridge input. 70 71 port@1: 72 $ref: /schemas/graph.yaml#/properties/port 73 description: 74 Second input port representing the DP bridge input. 75 76 port@2: 77 $ref: /schemas/graph.yaml#/properties/port 78 description: 79 Third input port representing the DP bridge input. 80 81 port@3: 82 $ref: /schemas/graph.yaml#/properties/port 83 description: 84 Fourth input port representing the DP bridge input. 85 86 port@4: 87 $ref: /schemas/graph.yaml#/properties/port 88 description: 89 Output port representing the DP bridge output. 90 91 required: 92 - port@0 93 - port@4 94 95allOf: 96 - if: 97 properties: 98 compatible: 99 contains: 100 const: ti,j721e-mhdp8546 101 then: 102 properties: 103 reg: 104 minItems: 2 105 maxItems: 3 106 reg-names: 107 minItems: 2 108 maxItems: 3 109 else: 110 properties: 111 reg: 112 minItems: 1 113 maxItems: 2 114 reg-names: 115 minItems: 1 116 maxItems: 2 117 118required: 119 - compatible 120 - clocks 121 - reg 122 - reg-names 123 - phys 124 - phy-names 125 - interrupts 126 - ports 127 128additionalProperties: false 129 130examples: 131 - | 132 #include <dt-bindings/interrupt-controller/arm-gic.h> 133 bus { 134 #address-cells = <2>; 135 #size-cells = <2>; 136 137 mhdp: dp-bridge@f0fb000000 { 138 compatible = "cdns,mhdp8546"; 139 reg = <0xf0 0xfb000000 0x0 0x1000000>; 140 reg-names = "mhdptx"; 141 clocks = <&mhdp_clock>; 142 phys = <&dp_phy>; 143 phy-names = "dpphy"; 144 interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 145 146 ports { 147 #address-cells = <1>; 148 #size-cells = <0>; 149 150 port@0 { 151 reg = <0>; 152 dp_bridge_input: endpoint { 153 remote-endpoint = <&xxx_dpi_output>; 154 }; 155 }; 156 157 port@4 { 158 reg = <4>; 159 dp_bridge_output: endpoint { 160 remote-endpoint = <&xxx_dp_connector_input>; 161 }; 162 }; 163 }; 164 }; 165 }; 166... 167