1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Cadence MHDP8546 bridge
8
9maintainers:
10  - Swapnil Jakhade <sjakhade@cadence.com>
11  - Yuti Amonkar <yamonkar@cadence.com>
12
13properties:
14  compatible:
15    enum:
16      - cdns,mhdp8546
17      - ti,j721e-mhdp8546
18
19  reg:
20    minItems: 1
21    maxItems: 2
22    items:
23      - description:
24          Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
25          The AUX and PMA registers are not part of this range, they are instead
26          included in the associated PHY.
27      - description:
28          Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
29
30  reg-names:
31    minItems: 1
32    maxItems: 2
33    items:
34      - const: mhdptx
35      - const: j721e-intg
36
37  clocks:
38    maxItems: 1
39    description:
40      DP bridge clock, used by the IP to know how to translate a number of
41      clock cycles into a time (which is used to comply with DP standard timings
42      and delays).
43
44  phys:
45    maxItems: 1
46    description:
47      phandle to the DisplayPort PHY.
48
49  phy-names:
50    items:
51      - const: dpphy
52
53  power-domains:
54    maxItems: 1
55
56  interrupts:
57    maxItems: 1
58
59  ports:
60    type: object
61    description:
62      Ports as described in Documentation/devicetree/bindings/graph.txt.
63
64    properties:
65      '#address-cells':
66        const: 1
67
68      '#size-cells':
69        const: 0
70
71      port@0:
72        type: object
73        description:
74          First input port representing the DP bridge input.
75
76      port@1:
77        type: object
78        description:
79          Second input port representing the DP bridge input.
80
81      port@2:
82        type: object
83        description:
84          Third input port representing the DP bridge input.
85
86      port@3:
87        type: object
88        description:
89          Fourth input port representing the DP bridge input.
90
91      port@4:
92        type: object
93        description:
94          Output port representing the DP bridge output.
95
96    required:
97      - port@0
98      - port@4
99      - '#address-cells'
100      - '#size-cells'
101
102allOf:
103  - if:
104      properties:
105        compatible:
106          contains:
107            const: ti,j721e-mhdp8546
108    then:
109      properties:
110        reg:
111          minItems: 2
112        reg-names:
113          minItems: 2
114    else:
115      properties:
116        reg:
117          maxItems: 1
118        reg-names:
119          maxItems: 1
120
121required:
122  - compatible
123  - clocks
124  - reg
125  - reg-names
126  - phys
127  - phy-names
128  - interrupts
129  - ports
130
131additionalProperties: false
132
133examples:
134  - |
135    #include <dt-bindings/interrupt-controller/arm-gic.h>
136    bus {
137        #address-cells = <2>;
138        #size-cells = <2>;
139
140        mhdp: dp-bridge@f0fb000000 {
141            compatible = "cdns,mhdp8546";
142            reg = <0xf0 0xfb000000 0x0 0x1000000>;
143            reg-names = "mhdptx";
144            clocks = <&mhdp_clock>;
145            phys = <&dp_phy>;
146            phy-names = "dpphy";
147            interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
148
149            ports {
150                #address-cells = <1>;
151                #size-cells = <0>;
152
153                port@0 {
154                    reg = <0>;
155                    dp_bridge_input: endpoint {
156                        remote-endpoint = <&xxx_dpi_output>;
157                    };
158                };
159
160                port@4 {
161                    reg = <4>;
162                    dp_bridge_output: endpoint {
163                        remote-endpoint = <&xxx_dp_connector_input>;
164                    };
165                };
166            };
167        };
168    };
169...
170