185649cc8SYuti Amonkar# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 285649cc8SYuti Amonkar%YAML 1.2 385649cc8SYuti Amonkar--- 4*4334aec0SRob Herring$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml# 5*4334aec0SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 685649cc8SYuti Amonkar 785649cc8SYuti Amonkartitle: Cadence MHDP8546 bridge 885649cc8SYuti Amonkar 985649cc8SYuti Amonkarmaintainers: 1085649cc8SYuti Amonkar - Swapnil Jakhade <sjakhade@cadence.com> 1185649cc8SYuti Amonkar - Yuti Amonkar <yamonkar@cadence.com> 1285649cc8SYuti Amonkar 1385649cc8SYuti Amonkarproperties: 1485649cc8SYuti Amonkar compatible: 1585649cc8SYuti Amonkar enum: 1685649cc8SYuti Amonkar - cdns,mhdp8546 1785649cc8SYuti Amonkar - ti,j721e-mhdp8546 1885649cc8SYuti Amonkar 1985649cc8SYuti Amonkar reg: 2085649cc8SYuti Amonkar minItems: 1 2185649cc8SYuti Amonkar items: 2285649cc8SYuti Amonkar - description: 2385649cc8SYuti Amonkar Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). 2485649cc8SYuti Amonkar The AUX and PMA registers are not part of this range, they are instead 2585649cc8SYuti Amonkar included in the associated PHY. 2685649cc8SYuti Amonkar - description: 2785649cc8SYuti Amonkar Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. 287169d082SParshuram Thombare - description: 297169d082SParshuram Thombare Register block of mhdptx sapb registers. 3085649cc8SYuti Amonkar 3185649cc8SYuti Amonkar reg-names: 3285649cc8SYuti Amonkar minItems: 1 3385649cc8SYuti Amonkar items: 3485649cc8SYuti Amonkar - const: mhdptx 3585649cc8SYuti Amonkar - const: j721e-intg 367169d082SParshuram Thombare - const: mhdptx-sapb 3785649cc8SYuti Amonkar 3885649cc8SYuti Amonkar clocks: 3985649cc8SYuti Amonkar maxItems: 1 4085649cc8SYuti Amonkar description: 4185649cc8SYuti Amonkar DP bridge clock, used by the IP to know how to translate a number of 4285649cc8SYuti Amonkar clock cycles into a time (which is used to comply with DP standard timings 4385649cc8SYuti Amonkar and delays). 4485649cc8SYuti Amonkar 4585649cc8SYuti Amonkar phys: 4685649cc8SYuti Amonkar maxItems: 1 4785649cc8SYuti Amonkar description: 4885649cc8SYuti Amonkar phandle to the DisplayPort PHY. 4985649cc8SYuti Amonkar 5085649cc8SYuti Amonkar phy-names: 5185649cc8SYuti Amonkar items: 5285649cc8SYuti Amonkar - const: dpphy 5385649cc8SYuti Amonkar 5485649cc8SYuti Amonkar power-domains: 5585649cc8SYuti Amonkar maxItems: 1 5685649cc8SYuti Amonkar 5785649cc8SYuti Amonkar interrupts: 5885649cc8SYuti Amonkar maxItems: 1 5985649cc8SYuti Amonkar 6085649cc8SYuti Amonkar ports: 61b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/ports 6285649cc8SYuti Amonkar 6385649cc8SYuti Amonkar properties: 6485649cc8SYuti Amonkar port@0: 65b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 6685649cc8SYuti Amonkar description: 6785649cc8SYuti Amonkar First input port representing the DP bridge input. 6885649cc8SYuti Amonkar 6985649cc8SYuti Amonkar port@1: 70b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 7185649cc8SYuti Amonkar description: 7285649cc8SYuti Amonkar Second input port representing the DP bridge input. 7385649cc8SYuti Amonkar 7485649cc8SYuti Amonkar port@2: 75b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 7685649cc8SYuti Amonkar description: 7785649cc8SYuti Amonkar Third input port representing the DP bridge input. 7885649cc8SYuti Amonkar 7985649cc8SYuti Amonkar port@3: 80b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 8185649cc8SYuti Amonkar description: 8285649cc8SYuti Amonkar Fourth input port representing the DP bridge input. 8385649cc8SYuti Amonkar 8485649cc8SYuti Amonkar port@4: 85b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 8685649cc8SYuti Amonkar description: 8785649cc8SYuti Amonkar Output port representing the DP bridge output. 8885649cc8SYuti Amonkar 8985649cc8SYuti Amonkar required: 9085649cc8SYuti Amonkar - port@0 9185649cc8SYuti Amonkar - port@4 9285649cc8SYuti Amonkar 9385649cc8SYuti AmonkarallOf: 9485649cc8SYuti Amonkar - if: 9585649cc8SYuti Amonkar properties: 9685649cc8SYuti Amonkar compatible: 9785649cc8SYuti Amonkar contains: 9885649cc8SYuti Amonkar const: ti,j721e-mhdp8546 9985649cc8SYuti Amonkar then: 10085649cc8SYuti Amonkar properties: 10185649cc8SYuti Amonkar reg: 10285649cc8SYuti Amonkar minItems: 2 1037169d082SParshuram Thombare maxItems: 3 10485649cc8SYuti Amonkar reg-names: 10585649cc8SYuti Amonkar minItems: 2 1067169d082SParshuram Thombare maxItems: 3 10785649cc8SYuti Amonkar else: 10885649cc8SYuti Amonkar properties: 10985649cc8SYuti Amonkar reg: 1107169d082SParshuram Thombare minItems: 1 1117169d082SParshuram Thombare maxItems: 2 11285649cc8SYuti Amonkar reg-names: 1137169d082SParshuram Thombare minItems: 1 1147169d082SParshuram Thombare maxItems: 2 11585649cc8SYuti Amonkar 11685649cc8SYuti Amonkarrequired: 11785649cc8SYuti Amonkar - compatible 11885649cc8SYuti Amonkar - clocks 11985649cc8SYuti Amonkar - reg 12085649cc8SYuti Amonkar - reg-names 12185649cc8SYuti Amonkar - phys 12285649cc8SYuti Amonkar - phy-names 12385649cc8SYuti Amonkar - interrupts 12485649cc8SYuti Amonkar - ports 12585649cc8SYuti Amonkar 12685649cc8SYuti AmonkaradditionalProperties: false 12785649cc8SYuti Amonkar 12885649cc8SYuti Amonkarexamples: 12985649cc8SYuti Amonkar - | 13085649cc8SYuti Amonkar #include <dt-bindings/interrupt-controller/arm-gic.h> 13185649cc8SYuti Amonkar bus { 13285649cc8SYuti Amonkar #address-cells = <2>; 13385649cc8SYuti Amonkar #size-cells = <2>; 13485649cc8SYuti Amonkar 13585649cc8SYuti Amonkar mhdp: dp-bridge@f0fb000000 { 13685649cc8SYuti Amonkar compatible = "cdns,mhdp8546"; 13785649cc8SYuti Amonkar reg = <0xf0 0xfb000000 0x0 0x1000000>; 13885649cc8SYuti Amonkar reg-names = "mhdptx"; 13985649cc8SYuti Amonkar clocks = <&mhdp_clock>; 14085649cc8SYuti Amonkar phys = <&dp_phy>; 14185649cc8SYuti Amonkar phy-names = "dpphy"; 14285649cc8SYuti Amonkar interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>; 14385649cc8SYuti Amonkar 14485649cc8SYuti Amonkar ports { 14585649cc8SYuti Amonkar #address-cells = <1>; 14685649cc8SYuti Amonkar #size-cells = <0>; 14785649cc8SYuti Amonkar 14885649cc8SYuti Amonkar port@0 { 14985649cc8SYuti Amonkar reg = <0>; 15085649cc8SYuti Amonkar dp_bridge_input: endpoint { 15185649cc8SYuti Amonkar remote-endpoint = <&xxx_dpi_output>; 15285649cc8SYuti Amonkar }; 15385649cc8SYuti Amonkar }; 15485649cc8SYuti Amonkar 15585649cc8SYuti Amonkar port@4 { 15685649cc8SYuti Amonkar reg = <4>; 15785649cc8SYuti Amonkar dp_bridge_output: endpoint { 15885649cc8SYuti Amonkar remote-endpoint = <&xxx_dp_connector_input>; 15985649cc8SYuti Amonkar }; 16085649cc8SYuti Amonkar }; 16185649cc8SYuti Amonkar }; 16285649cc8SYuti Amonkar }; 16385649cc8SYuti Amonkar }; 16485649cc8SYuti Amonkar... 165