1*59b2deaeSRahul T R# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*59b2deaeSRahul T R%YAML 1.2 3*59b2deaeSRahul T R--- 4*59b2deaeSRahul T R$id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml# 5*59b2deaeSRahul T R$schema: http://devicetree.org/meta-schemas/core.yaml# 6*59b2deaeSRahul T R 7*59b2deaeSRahul T Rtitle: Cadence DSI bridge 8*59b2deaeSRahul T R 9*59b2deaeSRahul T Rmaintainers: 10*59b2deaeSRahul T R - Boris Brezillon <boris.brezillon@bootlin.com> 11*59b2deaeSRahul T R 12*59b2deaeSRahul T Rdescription: | 13*59b2deaeSRahul T R CDNS DSI is a bridge device which converts DPI to DSI 14*59b2deaeSRahul T R 15*59b2deaeSRahul T Rproperties: 16*59b2deaeSRahul T R compatible: 17*59b2deaeSRahul T R enum: 18*59b2deaeSRahul T R - cdns,dsi 19*59b2deaeSRahul T R 20*59b2deaeSRahul T R reg: 21*59b2deaeSRahul T R maxItems: 1 22*59b2deaeSRahul T R 23*59b2deaeSRahul T R clocks: 24*59b2deaeSRahul T R items: 25*59b2deaeSRahul T R - description: PSM clock, used by the IP 26*59b2deaeSRahul T R - description: sys clock, used by the IP 27*59b2deaeSRahul T R 28*59b2deaeSRahul T R clock-names: 29*59b2deaeSRahul T R items: 30*59b2deaeSRahul T R - const: dsi_p_clk 31*59b2deaeSRahul T R - const: dsi_sys_clk 32*59b2deaeSRahul T R 33*59b2deaeSRahul T R phys: 34*59b2deaeSRahul T R maxItems: 1 35*59b2deaeSRahul T R 36*59b2deaeSRahul T R phy-names: 37*59b2deaeSRahul T R const: dphy 38*59b2deaeSRahul T R 39*59b2deaeSRahul T R interrupts: 40*59b2deaeSRahul T R maxItems: 1 41*59b2deaeSRahul T R 42*59b2deaeSRahul T R resets: 43*59b2deaeSRahul T R maxItems: 1 44*59b2deaeSRahul T R 45*59b2deaeSRahul T R reset-names: 46*59b2deaeSRahul T R const: dsi_p_rst 47*59b2deaeSRahul T R 48*59b2deaeSRahul T R ports: 49*59b2deaeSRahul T R $ref: /schemas/graph.yaml#/properties/ports 50*59b2deaeSRahul T R 51*59b2deaeSRahul T R properties: 52*59b2deaeSRahul T R port@0: 53*59b2deaeSRahul T R $ref: /schemas/graph.yaml#/properties/port 54*59b2deaeSRahul T R description: 55*59b2deaeSRahul T R Output port representing the DSI output. It can have 56*59b2deaeSRahul T R at most 4 endpoints. The endpoint number is directly encoding 57*59b2deaeSRahul T R the DSI virtual channel used by this device. 58*59b2deaeSRahul T R 59*59b2deaeSRahul T R port@1: 60*59b2deaeSRahul T R $ref: /schemas/graph.yaml#/properties/port 61*59b2deaeSRahul T R description: 62*59b2deaeSRahul T R Input port representing the DPI input. 63*59b2deaeSRahul T R 64*59b2deaeSRahul T R required: 65*59b2deaeSRahul T R - port@1 66*59b2deaeSRahul T R 67*59b2deaeSRahul T RallOf: 68*59b2deaeSRahul T R - $ref: ../dsi-controller.yaml# 69*59b2deaeSRahul T R 70*59b2deaeSRahul T Rrequired: 71*59b2deaeSRahul T R - compatible 72*59b2deaeSRahul T R - reg 73*59b2deaeSRahul T R - interrupts 74*59b2deaeSRahul T R - clocks 75*59b2deaeSRahul T R - clock-names 76*59b2deaeSRahul T R - phys 77*59b2deaeSRahul T R - phy-names 78*59b2deaeSRahul T R - ports 79*59b2deaeSRahul T R 80*59b2deaeSRahul T RunevaluatedProperties: false 81*59b2deaeSRahul T R 82*59b2deaeSRahul T Rexamples: 83*59b2deaeSRahul T R - | 84*59b2deaeSRahul T R bus { 85*59b2deaeSRahul T R #address-cells = <2>; 86*59b2deaeSRahul T R #size-cells = <2>; 87*59b2deaeSRahul T R 88*59b2deaeSRahul T R dsi@fd0c0000 { 89*59b2deaeSRahul T R compatible = "cdns,dsi"; 90*59b2deaeSRahul T R reg = <0x0 0xfd0c0000 0x0 0x1000>; 91*59b2deaeSRahul T R clocks = <&pclk>, <&sysclk>; 92*59b2deaeSRahul T R clock-names = "dsi_p_clk", "dsi_sys_clk"; 93*59b2deaeSRahul T R interrupts = <1>; 94*59b2deaeSRahul T R phys = <&dphy0>; 95*59b2deaeSRahul T R phy-names = "dphy"; 96*59b2deaeSRahul T R 97*59b2deaeSRahul T R #address-cells = <1>; 98*59b2deaeSRahul T R #size-cells = <0>; 99*59b2deaeSRahul T R 100*59b2deaeSRahul T R ports { 101*59b2deaeSRahul T R #address-cells = <1>; 102*59b2deaeSRahul T R #size-cells = <0>; 103*59b2deaeSRahul T R 104*59b2deaeSRahul T R port@1 { 105*59b2deaeSRahul T R reg = <1>; 106*59b2deaeSRahul T R endpoint { 107*59b2deaeSRahul T R remote-endpoint = <&xxx_dpi_output>; 108*59b2deaeSRahul T R }; 109*59b2deaeSRahul T R }; 110*59b2deaeSRahul T R }; 111*59b2deaeSRahul T R 112*59b2deaeSRahul T R panel@0 { 113*59b2deaeSRahul T R compatible = "panasonic,vvx10f034n00"; 114*59b2deaeSRahul T R reg = <0>; 115*59b2deaeSRahul T R power-supply = <&vcc_lcd_reg>; 116*59b2deaeSRahul T R }; 117*59b2deaeSRahul T R }; 118*59b2deaeSRahul T R }; 119*59b2deaeSRahul T R 120*59b2deaeSRahul T R - | 121*59b2deaeSRahul T R bus { 122*59b2deaeSRahul T R #address-cells = <2>; 123*59b2deaeSRahul T R #size-cells = <2>; 124*59b2deaeSRahul T R 125*59b2deaeSRahul T R dsi@fd0c0000 { 126*59b2deaeSRahul T R compatible = "cdns,dsi"; 127*59b2deaeSRahul T R reg = <0x0 0xfd0c0000 0x0 0x1000>; 128*59b2deaeSRahul T R clocks = <&pclk>, <&sysclk>; 129*59b2deaeSRahul T R clock-names = "dsi_p_clk", "dsi_sys_clk"; 130*59b2deaeSRahul T R interrupts = <1>; 131*59b2deaeSRahul T R phys = <&dphy1>; 132*59b2deaeSRahul T R phy-names = "dphy"; 133*59b2deaeSRahul T R 134*59b2deaeSRahul T R ports { 135*59b2deaeSRahul T R #address-cells = <1>; 136*59b2deaeSRahul T R #size-cells = <0>; 137*59b2deaeSRahul T R 138*59b2deaeSRahul T R port@0 { 139*59b2deaeSRahul T R reg = <0>; 140*59b2deaeSRahul T R #address-cells = <1>; 141*59b2deaeSRahul T R #size-cells = <0>; 142*59b2deaeSRahul T R 143*59b2deaeSRahul T R endpoint@0 { 144*59b2deaeSRahul T R reg = <0>; 145*59b2deaeSRahul T R remote-endpoint = <&dsi_panel_input>; 146*59b2deaeSRahul T R }; 147*59b2deaeSRahul T R }; 148*59b2deaeSRahul T R 149*59b2deaeSRahul T R port@1 { 150*59b2deaeSRahul T R reg = <1>; 151*59b2deaeSRahul T R endpoint { 152*59b2deaeSRahul T R remote-endpoint = <&xxx_dpi_output>; 153*59b2deaeSRahul T R }; 154*59b2deaeSRahul T R }; 155*59b2deaeSRahul T R }; 156*59b2deaeSRahul T R }; 157*59b2deaeSRahul T R }; 158