1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2019 Analogix Semiconductor, Inc. 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter) 9 10maintainers: 11 - Xin Ji <xji@analogixsemi.com> 12 13description: | 14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter 15 designed for portable devices. 16 17properties: 18 compatible: 19 items: 20 - const: analogix,anx7625 21 22 reg: 23 maxItems: 1 24 25 interrupts: 26 description: used for interrupt pin B8. 27 maxItems: 1 28 29 enable-gpios: 30 description: used for power on chip control, POWER_EN pin D2. 31 maxItems: 1 32 33 reset-gpios: 34 description: used for reset chip control, RESET_N pin B7. 35 maxItems: 1 36 37 vdd10-supply: 38 description: Regulator that provides the supply 1.0V power. 39 40 vdd18-supply: 41 description: Regulator that provides the supply 1.8V power. 42 43 vdd33-supply: 44 description: Regulator that provides the supply 3.3V power. 45 46 analogix,lane0-swing: 47 $ref: /schemas/types.yaml#/definitions/uint8-array 48 minItems: 1 49 maxItems: 20 50 description: 51 an array of swing register setting for DP tx lane0 PHY. 52 Registers 0~9 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0, 53 Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2, 54 Swing1_Pre2, Swing0_Pre3, they are for [Boost control] and 55 [Swing control] setting. 56 Registers 0~9, bit 3:0 is [Boost control], these bits control 57 post cursor manual, increase the [Boost control] to increase 58 Pre-emphasis value. 59 Registers 0~9, bit 6:4 is [Swing control], these bits control 60 swing manual, increase [Swing control] setting to add Vp-p value 61 for each Swing, Pre. 62 Registers 10~19 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0, 63 Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2, 64 Swing1_Pre2, Swing0_Pre3, they are for [R select control] and 65 [R Termination control] setting. 66 Registers 10~19, bit 4:0 is [R select control], these bits are 67 compensation manual, increase it can enhance IO driven strength 68 and Vp-p. 69 Registers 10~19, bit 5:6 is [R termination control], these bits 70 adjust 50ohm impedance of DP tx termination. 00:55 ohm, 71 01:50 ohm(default), 10:45 ohm, 11:40 ohm. 72 73 analogix,lane1-swing: 74 $ref: /schemas/types.yaml#/definitions/uint8-array 75 minItems: 1 76 maxItems: 20 77 description: 78 an array of swing register setting for DP tx lane1 PHY. 79 DP TX lane1 swing register setting same with lane0 80 swing, please refer lane0-swing property description. 81 82 analogix,audio-enable: 83 type: boolean 84 description: let the driver enable audio HDMI codec function or not. 85 86 ports: 87 $ref: /schemas/graph.yaml#/properties/ports 88 89 properties: 90 port@0: 91 $ref: /schemas/graph.yaml#/$defs/port-base 92 unevaluatedProperties: false 93 description: 94 MIPI DSI/DPI input. 95 96 properties: 97 endpoint: 98 $ref: /schemas/media/video-interfaces.yaml# 99 type: object 100 additionalProperties: false 101 102 properties: 103 remote-endpoint: true 104 105 bus-type: 106 enum: [1, 5] 107 default: 1 108 109 data-lanes: true 110 111 port@1: 112 $ref: /schemas/graph.yaml#/properties/port 113 description: 114 Video port for panel or connector. 115 116 required: 117 - port@0 118 - port@1 119 120required: 121 - compatible 122 - reg 123 - vdd10-supply 124 - vdd18-supply 125 - vdd33-supply 126 - ports 127 128additionalProperties: false 129 130examples: 131 - | 132 #include <dt-bindings/gpio/gpio.h> 133 134 i2c0 { 135 #address-cells = <1>; 136 #size-cells = <0>; 137 138 encoder@58 { 139 compatible = "analogix,anx7625"; 140 reg = <0x58>; 141 enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>; 142 reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>; 143 vdd10-supply = <&pp1000_mipibrdg>; 144 vdd18-supply = <&pp1800_mipibrdg>; 145 vdd33-supply = <&pp3300_mipibrdg>; 146 analogix,audio-enable; 147 analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>; 148 analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>; 149 150 ports { 151 #address-cells = <1>; 152 #size-cells = <0>; 153 154 mipi2dp_bridge_in: port@0 { 155 reg = <0>; 156 anx7625_in: endpoint { 157 remote-endpoint = <&mipi_dsi>; 158 bus-type = <5>; 159 data-lanes = <0 1 2 3>; 160 }; 161 }; 162 163 mipi2dp_bridge_out: port@1 { 164 reg = <1>; 165 anx7625_out: endpoint { 166 remote-endpoint = <&panel_in>; 167 }; 168 }; 169 }; 170 }; 171 }; 172