1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Broadcom BCM2711 HDMI Controller Device Tree Bindings 8 9maintainers: 10 - Eric Anholt <eric@anholt.net> 11 12properties: 13 compatible: 14 enum: 15 - brcm,bcm2711-hdmi0 16 - brcm,bcm2711-hdmi1 17 18 reg: 19 items: 20 - description: HDMI controller register range 21 - description: DVP register range 22 - description: HDMI PHY register range 23 - description: Rate Manager register range 24 - description: Packet RAM register range 25 - description: Metadata RAM register range 26 - description: CSC register range 27 - description: CEC register range 28 - description: HD register range 29 30 reg-names: 31 items: 32 - const: hdmi 33 - const: dvp 34 - const: phy 35 - const: rm 36 - const: packet 37 - const: metadata 38 - const: csc 39 - const: cec 40 - const: hd 41 42 clocks: 43 items: 44 - description: The HDMI state machine clock 45 - description: The Pixel BVB clock 46 - description: The HDMI Audio parent clock 47 - description: The HDMI CEC parent clock 48 49 clock-names: 50 items: 51 - const: hdmi 52 - const: bvb 53 - const: audio 54 - const: cec 55 56 ddc: 57 allOf: 58 - $ref: /schemas/types.yaml#/definitions/phandle 59 description: > 60 Phandle of the I2C controller used for DDC EDID probing 61 62 hpd-gpios: 63 description: > 64 The GPIO pin for the HDMI hotplug detect (if it doesn't appear 65 as an interrupt/status bit in the HDMI controller itself) 66 67 dmas: 68 maxItems: 1 69 description: > 70 Should contain one entry pointing to the DMA channel used to 71 transfer audio data. 72 73 dma-names: 74 const: audio-rx 75 76 resets: 77 maxItems: 1 78 79required: 80 - compatible 81 - reg 82 - reg-names 83 - clocks 84 - resets 85 - ddc 86 87additionalProperties: false 88 89examples: 90 - | 91 hdmi0: hdmi@7ef00700 { 92 compatible = "brcm,bcm2711-hdmi0"; 93 reg = <0x7ef00700 0x300>, 94 <0x7ef00300 0x200>, 95 <0x7ef00f00 0x80>, 96 <0x7ef00f80 0x80>, 97 <0x7ef01b00 0x200>, 98 <0x7ef01f00 0x400>, 99 <0x7ef00200 0x80>, 100 <0x7ef04300 0x100>, 101 <0x7ef20000 0x100>; 102 reg-names = "hdmi", 103 "dvp", 104 "phy", 105 "rm", 106 "packet", 107 "metadata", 108 "csc", 109 "cec", 110 "hd"; 111 clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; 112 clock-names = "hdmi", "bvb", "audio", "cec"; 113 resets = <&dvp 0>; 114 ddc = <&ddc0>; 115 }; 116 117... 118