1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/arm,malidp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Arm Mali Display Processor (Mali-DP) binding
8
9maintainers:
10  - Liviu Dudau <Liviu.Dudau@arm.com>
11  - Andre Przywara <andre.przywara@arm.com>
12
13description:
14  The following bindings apply to a family of Display Processors sold as
15  licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
16  DP650 processors that offer multiple composition layers, support for
17  rotation and scaling output.
18
19properties:
20  compatible:
21    enum:
22      - arm,mali-dp500
23      - arm,mali-dp550
24      - arm,mali-dp650
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    items:
31      - description:
32          The interrupt used by the Display Engine (DE). Can be shared with
33          the interrupt for the Scaling Engine (SE), but it will have to be
34          listed individually.
35      - description:
36          The interrupt used by the Scaling Engine (SE). Can be shared with
37          the interrupt for the Display Engine (DE), but it will have to be
38          listed individually.
39
40  interrupt-names:
41    items:
42      - const: DE
43      - const: SE
44
45  clock-names:
46    items:
47      - const: pxlclk
48      - const: mclk
49      - const: aclk
50      - const: pclk
51
52  clocks:
53    items:
54      - description: the pixel clock feeding the output PLL of the processor
55      - description: the main processor clock
56      - description: the AXI interface clock
57      - description: the APB interface clock
58
59  memory-region:
60    maxItems: 1
61    description:
62      Phandle to a node describing memory to be used for the framebuffer.
63      If not present, the framebuffer may be located anywhere in memory.
64
65  arm,malidp-output-port-lines:
66    $ref: /schemas/types.yaml#/definitions/uint8-array
67    description:
68      Number of output lines/bits for each colour channel.
69    items:
70      - description: number of output lines for the red channel (R)
71      - description: number of output lines for the green channel (G)
72      - description: number of output lines for the blue channel (B)
73
74  arm,malidp-arqos-value:
75    $ref: /schemas/types.yaml#/definitions/uint32
76    description:
77      Quality-of-Service value for the display engine FIFOs, to write
78      into the RQOS register of the DP500.
79      See the ARM Mali-DP500 TRM for details on the encoding.
80      If omitted, the RQOS register will not be changed.
81
82  port:
83    $ref: /schemas/graph.yaml#/properties/port
84    unevaluatedProperties: false
85    description:
86      Output endpoint of the controller, connecting the LCD panel signals.
87
88additionalProperties: false
89
90required:
91  - compatible
92  - reg
93  - interrupts
94  - interrupt-names
95  - clocks
96  - clock-names
97  - port
98  - arm,malidp-output-port-lines
99
100examples:
101  - |
102    dp0: malidp@6f200000 {
103        compatible = "arm,mali-dp650";
104        reg = <0x6f200000 0x20000>;
105        memory-region = <&display_reserved>;
106        interrupts = <168>, <168>;
107        interrupt-names = "DE", "SE";
108        clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
109        clock-names = "pxlclk", "mclk", "aclk", "pclk";
110        arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
111        arm,malidp-arqos-value = <0xd000d000>;
112
113        port {
114            dp0_output: endpoint {
115                remote-endpoint = <&tda998x_2_input>;
116            };
117        };
118    };
119...
120