1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-de2-mixer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner Display Engine 2.0 Mixer Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  compatible:
15    enum:
16      - allwinner,sun8i-a83t-de2-mixer-0
17      - allwinner,sun8i-a83t-de2-mixer-1
18      - allwinner,sun8i-h3-de2-mixer-0
19      - allwinner,sun8i-r40-de2-mixer-0
20      - allwinner,sun8i-r40-de2-mixer-1
21      - allwinner,sun8i-v3s-de2-mixer
22      - allwinner,sun50i-a64-de2-mixer-0
23      - allwinner,sun50i-a64-de2-mixer-1
24      - allwinner,sun50i-h6-de3-mixer-0
25
26  reg:
27    maxItems: 1
28
29  clocks:
30    items:
31      - description: The mixer interface clock
32      - description: The mixer module clock
33
34  clock-names:
35    items:
36      - const: bus
37      - const: mod
38
39  iommus:
40    maxItems: 1
41
42  resets:
43    maxItems: 1
44
45  ports:
46    type: object
47    description: |
48      A ports node with endpoint definitions as defined in
49      Documentation/devicetree/bindings/media/video-interfaces.txt.
50
51    properties:
52      "#address-cells":
53        const: 1
54
55      "#size-cells":
56        const: 0
57
58      port@0:
59        type: object
60        description: |
61          Input endpoints of the controller.
62
63      port@1:
64        type: object
65        description: |
66          Output endpoints of the controller.
67
68    required:
69      - "#address-cells"
70      - "#size-cells"
71      - port@1
72
73    additionalProperties: false
74
75required:
76  - compatible
77  - reg
78  - clocks
79  - clock-names
80  - resets
81  - ports
82
83additionalProperties: false
84
85examples:
86  - |
87    #include <dt-bindings/clock/sun8i-de2.h>
88    #include <dt-bindings/reset/sun8i-de2.h>
89
90    mixer0: mixer@1100000 {
91        compatible = "allwinner,sun8i-a83t-de2-mixer-0";
92        reg = <0x01100000 0x100000>;
93        clocks = <&display_clocks CLK_BUS_MIXER0>,
94                 <&display_clocks CLK_MIXER0>;
95        clock-names = "bus",
96                      "mod";
97        resets = <&display_clocks RST_MIXER0>;
98
99        ports {
100            #address-cells = <1>;
101            #size-cells = <0>;
102
103            mixer0_out: port@1 {
104                #address-cells = <1>;
105                #size-cells = <0>;
106                reg = <1>;
107
108                mixer0_out_tcon0: endpoint@0 {
109                    reg = <0>;
110                    remote-endpoint = <&tcon0_in_mixer0>;
111                };
112
113                mixer0_out_tcon1: endpoint@1 {
114                    reg = <1>;
115                    remote-endpoint = <&tcon1_in_mixer0>;
116                };
117            };
118        };
119    };
120
121...
122