1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 HDMI Controller Device Tree Bindings
8
9description: |
10  The HDMI Encoder supports the HDMI video and audio outputs, and does
11  CEC. It is one end of the pipeline.
12
13maintainers:
14  - Chen-Yu Tsai <wens@csie.org>
15  - Maxime Ripard <mripard@kernel.org>
16
17properties:
18  compatible:
19    oneOf:
20      - const: allwinner,sun4i-a10-hdmi
21      - const: allwinner,sun5i-a10s-hdmi
22      - const: allwinner,sun6i-a31-hdmi
23      - items:
24          - const: allwinner,sun7i-a20-hdmi
25          - const: allwinner,sun5i-a10s-hdmi
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    maxItems: 1
32
33  clocks:
34    oneOf:
35      - items:
36          - description: The HDMI interface clock
37          - description: The HDMI module clock
38          - description: The first video PLL
39          - description: The second video PLL
40
41      - items:
42          - description: The HDMI interface clock
43          - description: The HDMI module clock
44          - description: The HDMI DDC clock
45          - description: The first video PLL
46          - description: The second video PLL
47
48  clock-names:
49    oneOf:
50      - items:
51          - const: ahb
52          - const: mod
53          - const: pll-0
54          - const: pll-1
55
56      - items:
57          - const: ahb
58          - const: mod
59          - const: ddc
60          - const: pll-0
61          - const: pll-1
62
63  resets:
64    maxItems: 1
65
66  dmas:
67    items:
68      - description: DDC Transmission DMA Channel
69      - description: DDC Reception DMA Channel
70      - description: Audio Transmission DMA Channel
71
72  dma-names:
73    items:
74      - const: ddc-tx
75      - const: ddc-rx
76      - const: audio-tx
77
78  ports:
79    type: object
80    description: |
81      A ports node with endpoint definitions as defined in
82      Documentation/devicetree/bindings/media/video-interfaces.txt.
83
84    properties:
85      "#address-cells":
86        const: 1
87
88      "#size-cells":
89        const: 0
90
91      port@0:
92        type: object
93        description: |
94          Input endpoints of the controller.
95
96      port@1:
97        type: object
98        description: |
99          Output endpoints of the controller. Usually an HDMI
100          connector.
101
102    required:
103      - "#address-cells"
104      - "#size-cells"
105      - port@0
106      - port@1
107
108    additionalProperties: false
109
110required:
111  - compatible
112  - reg
113  - interrupts
114  - clocks
115  - clock-names
116  - dmas
117  - dma-names
118
119if:
120  properties:
121    compatible:
122      contains:
123        const: allwinner,sun6i-a31-hdmi
124
125then:
126  properties:
127    clocks:
128      minItems: 5
129
130    clock-names:
131      minItems: 5
132
133  required:
134    - resets
135
136additionalProperties: false
137
138examples:
139  - |
140    #include <dt-bindings/clock/sun4i-a10-ccu.h>
141    #include <dt-bindings/dma/sun4i-a10.h>
142    #include <dt-bindings/reset/sun4i-a10-ccu.h>
143
144    hdmi: hdmi@1c16000 {
145        compatible = "allwinner,sun4i-a10-hdmi";
146        reg = <0x01c16000 0x1000>;
147        interrupts = <58>;
148        clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
149                 <&ccu CLK_PLL_VIDEO0_2X>,
150                 <&ccu CLK_PLL_VIDEO1_2X>;
151        clock-names = "ahb", "mod", "pll-0", "pll-1";
152        dmas = <&dma SUN4I_DMA_NORMAL 16>,
153               <&dma SUN4I_DMA_NORMAL 16>,
154               <&dma SUN4I_DMA_DEDICATED 24>;
155        dma-names = "ddc-tx", "ddc-rx", "audio-tx";
156
157        ports {
158            #address-cells = <1>;
159            #size-cells = <0>;
160
161            hdmi_in: port@0 {
162                #address-cells = <1>;
163                #size-cells = <0>;
164                reg = <0>;
165
166                hdmi_in_tcon0: endpoint@0 {
167                    reg = <0>;
168                    remote-endpoint = <&tcon0_out_hdmi>;
169                };
170
171                hdmi_in_tcon1: endpoint@1 {
172                    reg = <1>;
173                    remote-endpoint = <&tcon1_out_hdmi>;
174                };
175            };
176
177            hdmi_out: port@1 {
178                reg = <1>;
179            };
180        };
181    };
182
183...
184