1f5a98bfeSMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2f5a98bfeSMaxime Ripard%YAML 1.2
3f5a98bfeSMaxime Ripard---
4f5a98bfeSMaxime Ripard$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
5f5a98bfeSMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6f5a98bfeSMaxime Ripard
7*dd3cb467SAndrew Lunntitle: Allwinner A10 Display Engine Backend
8f5a98bfeSMaxime Ripard
9f5a98bfeSMaxime Ripardmaintainers:
10f5a98bfeSMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11f5a98bfeSMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12f5a98bfeSMaxime Ripard
13f5a98bfeSMaxime Riparddescription: |
14f5a98bfeSMaxime Ripard  The display engine backend exposes layers and sprites to the system.
15f5a98bfeSMaxime Ripard
16f5a98bfeSMaxime Ripardproperties:
17f5a98bfeSMaxime Ripard  compatible:
18f5a98bfeSMaxime Ripard    enum:
19f5a98bfeSMaxime Ripard      - allwinner,sun4i-a10-display-backend
20f5a98bfeSMaxime Ripard      - allwinner,sun5i-a13-display-backend
21f5a98bfeSMaxime Ripard      - allwinner,sun6i-a31-display-backend
22f5a98bfeSMaxime Ripard      - allwinner,sun7i-a20-display-backend
23f5a98bfeSMaxime Ripard      - allwinner,sun8i-a23-display-backend
24f5a98bfeSMaxime Ripard      - allwinner,sun8i-a33-display-backend
25f5a98bfeSMaxime Ripard      - allwinner,sun9i-a80-display-backend
26f5a98bfeSMaxime Ripard
27f5a98bfeSMaxime Ripard  reg:
28f5a98bfeSMaxime Ripard    minItems: 1
29f5a98bfeSMaxime Ripard    items:
30f5a98bfeSMaxime Ripard      - description: Display Backend registers
31f5a98bfeSMaxime Ripard      - description: SAT registers
32f5a98bfeSMaxime Ripard
33f5a98bfeSMaxime Ripard  reg-names:
34f5a98bfeSMaxime Ripard    minItems: 1
35f5a98bfeSMaxime Ripard    items:
36f5a98bfeSMaxime Ripard      - const: be
37f5a98bfeSMaxime Ripard      - const: sat
38f5a98bfeSMaxime Ripard
39f5a98bfeSMaxime Ripard  interrupts:
40f5a98bfeSMaxime Ripard    maxItems: 1
41f5a98bfeSMaxime Ripard
42f5a98bfeSMaxime Ripard  clocks:
43f5a98bfeSMaxime Ripard    minItems: 3
44f5a98bfeSMaxime Ripard    items:
45f5a98bfeSMaxime Ripard      - description: The backend interface clock
46f5a98bfeSMaxime Ripard      - description: The backend module clock
47f5a98bfeSMaxime Ripard      - description: The backend DRAM clock
48f5a98bfeSMaxime Ripard      - description: The SAT clock
49f5a98bfeSMaxime Ripard
50f5a98bfeSMaxime Ripard  clock-names:
51f5a98bfeSMaxime Ripard    minItems: 3
52f5a98bfeSMaxime Ripard    items:
53f5a98bfeSMaxime Ripard      - const: ahb
54f5a98bfeSMaxime Ripard      - const: mod
55f5a98bfeSMaxime Ripard      - const: ram
56f5a98bfeSMaxime Ripard      - const: sat
57f5a98bfeSMaxime Ripard
58f5a98bfeSMaxime Ripard  resets:
59f5a98bfeSMaxime Ripard    minItems: 1
60f5a98bfeSMaxime Ripard    items:
61f5a98bfeSMaxime Ripard      - description: The Backend reset line
62f5a98bfeSMaxime Ripard      - description: The SAT reset line
63f5a98bfeSMaxime Ripard
64f5a98bfeSMaxime Ripard  reset-names:
65f5a98bfeSMaxime Ripard    minItems: 1
66f5a98bfeSMaxime Ripard    items:
67f5a98bfeSMaxime Ripard      - const: be
68f5a98bfeSMaxime Ripard      - const: sat
69f5a98bfeSMaxime Ripard
70f5a98bfeSMaxime Ripard  # FIXME: This should be made required eventually once every SoC will
71f5a98bfeSMaxime Ripard  # have the MBUS declared.
72f5a98bfeSMaxime Ripard  interconnects:
73f5a98bfeSMaxime Ripard    maxItems: 1
74f5a98bfeSMaxime Ripard
75f5a98bfeSMaxime Ripard  # FIXME: This should be made required eventually once every SoC will
76f5a98bfeSMaxime Ripard  # have the MBUS declared.
77f5a98bfeSMaxime Ripard  interconnect-names:
78f5a98bfeSMaxime Ripard    const: dma-mem
79f5a98bfeSMaxime Ripard
80f5a98bfeSMaxime Ripard  ports:
81b6755423SRob Herring    $ref: /schemas/graph.yaml#/properties/ports
82f5a98bfeSMaxime Ripard
83f5a98bfeSMaxime Ripard    properties:
84f5a98bfeSMaxime Ripard      port@0:
85b6755423SRob Herring        $ref: /schemas/graph.yaml#/properties/port
86b6755423SRob Herring        description:
87f5a98bfeSMaxime Ripard          Input endpoints of the controller.
88f5a98bfeSMaxime Ripard
89f5a98bfeSMaxime Ripard      port@1:
90b6755423SRob Herring        $ref: /schemas/graph.yaml#/properties/port
91b6755423SRob Herring        description:
92f5a98bfeSMaxime Ripard          Output endpoints of the controller.
93f5a98bfeSMaxime Ripard
94f5a98bfeSMaxime Ripard    required:
95f5a98bfeSMaxime Ripard      - port@0
96f5a98bfeSMaxime Ripard      - port@1
97f5a98bfeSMaxime Ripard
98f5a98bfeSMaxime Ripardrequired:
99f5a98bfeSMaxime Ripard  - compatible
100f5a98bfeSMaxime Ripard  - reg
101f5a98bfeSMaxime Ripard  - interrupts
102f5a98bfeSMaxime Ripard  - clocks
103f5a98bfeSMaxime Ripard  - clock-names
104f5a98bfeSMaxime Ripard  - resets
105f5a98bfeSMaxime Ripard  - ports
106f5a98bfeSMaxime Ripard
107f5a98bfeSMaxime RipardadditionalProperties: false
108f5a98bfeSMaxime Ripard
109f5a98bfeSMaxime Ripardif:
110f5a98bfeSMaxime Ripard  properties:
111f5a98bfeSMaxime Ripard    compatible:
112f5a98bfeSMaxime Ripard      contains:
113f5a98bfeSMaxime Ripard        const: allwinner,sun8i-a33-display-backend
114f5a98bfeSMaxime Ripard
115f5a98bfeSMaxime Ripardthen:
116f5a98bfeSMaxime Ripard  properties:
117f5a98bfeSMaxime Ripard    reg:
118f5a98bfeSMaxime Ripard      minItems: 2
119f5a98bfeSMaxime Ripard
120f5a98bfeSMaxime Ripard    reg-names:
121f5a98bfeSMaxime Ripard      minItems: 2
122f5a98bfeSMaxime Ripard
123f5a98bfeSMaxime Ripard    clocks:
124f5a98bfeSMaxime Ripard      minItems: 4
125f5a98bfeSMaxime Ripard
126f5a98bfeSMaxime Ripard    clock-names:
127f5a98bfeSMaxime Ripard      minItems: 4
128f5a98bfeSMaxime Ripard
129f5a98bfeSMaxime Ripard    resets:
130f5a98bfeSMaxime Ripard      minItems: 2
131f5a98bfeSMaxime Ripard
132f5a98bfeSMaxime Ripard    reset-names:
133f5a98bfeSMaxime Ripard      minItems: 2
134f5a98bfeSMaxime Ripard
135f5a98bfeSMaxime Ripard  required:
136f5a98bfeSMaxime Ripard    - reg-names
137f5a98bfeSMaxime Ripard    - reset-names
138f5a98bfeSMaxime Ripard
139f5a98bfeSMaxime Ripardelse:
140f5a98bfeSMaxime Ripard  properties:
141f5a98bfeSMaxime Ripard    reg:
142f5a98bfeSMaxime Ripard      maxItems: 1
143f5a98bfeSMaxime Ripard
144f5a98bfeSMaxime Ripard    reg-names:
145f5a98bfeSMaxime Ripard      maxItems: 1
146f5a98bfeSMaxime Ripard
147f5a98bfeSMaxime Ripard    clocks:
148f5a98bfeSMaxime Ripard      maxItems: 3
149f5a98bfeSMaxime Ripard
150f5a98bfeSMaxime Ripard    clock-names:
151f5a98bfeSMaxime Ripard      maxItems: 3
152f5a98bfeSMaxime Ripard
153f5a98bfeSMaxime Ripard    resets:
154f5a98bfeSMaxime Ripard      maxItems: 1
155f5a98bfeSMaxime Ripard
156f5a98bfeSMaxime Ripard    reset-names:
157f5a98bfeSMaxime Ripard      maxItems: 1
158f5a98bfeSMaxime Ripard
159f5a98bfeSMaxime Ripardexamples:
160f5a98bfeSMaxime Ripard  - |
161f5a98bfeSMaxime Ripard    /*
162f5a98bfeSMaxime Ripard     * This comes from the clock/sun4i-a10-ccu.h and
163f5a98bfeSMaxime Ripard     * reset/sun4i-a10-ccu.h headers, but we can't include them since
164f5a98bfeSMaxime Ripard     * it would trigger a bunch of warnings for redefinitions of
165f5a98bfeSMaxime Ripard     * symbols with the other example.
166f5a98bfeSMaxime Ripard     */
167f5a98bfeSMaxime Ripard
168f5a98bfeSMaxime Ripard    #define CLK_AHB_DE_BE0	42
169f5a98bfeSMaxime Ripard    #define CLK_DRAM_DE_BE0	140
170f5a98bfeSMaxime Ripard    #define CLK_DE_BE0		144
171f5a98bfeSMaxime Ripard    #define RST_DE_BE0		5
172f5a98bfeSMaxime Ripard
173f5a98bfeSMaxime Ripard    display-backend@1e60000 {
174f5a98bfeSMaxime Ripard        compatible = "allwinner,sun4i-a10-display-backend";
175f5a98bfeSMaxime Ripard        reg = <0x01e60000 0x10000>;
176f5a98bfeSMaxime Ripard        interrupts = <47>;
177f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
178f5a98bfeSMaxime Ripard                 <&ccu CLK_DRAM_DE_BE0>;
179f5a98bfeSMaxime Ripard        clock-names = "ahb", "mod",
180f5a98bfeSMaxime Ripard                      "ram";
181f5a98bfeSMaxime Ripard        resets = <&ccu RST_DE_BE0>;
182f5a98bfeSMaxime Ripard
183f5a98bfeSMaxime Ripard        ports {
184f5a98bfeSMaxime Ripard            #address-cells = <1>;
185f5a98bfeSMaxime Ripard            #size-cells = <0>;
186f5a98bfeSMaxime Ripard
187f5a98bfeSMaxime Ripard            port@0 {
188f5a98bfeSMaxime Ripard                #address-cells = <1>;
189f5a98bfeSMaxime Ripard                #size-cells = <0>;
190f5a98bfeSMaxime Ripard                reg = <0>;
191f5a98bfeSMaxime Ripard
192f5a98bfeSMaxime Ripard                endpoint@0 {
193f5a98bfeSMaxime Ripard                    reg = <0>;
194f5a98bfeSMaxime Ripard                    remote-endpoint = <&fe0_out_be0>;
195f5a98bfeSMaxime Ripard                };
196f5a98bfeSMaxime Ripard
197f5a98bfeSMaxime Ripard                endpoint@1 {
198f5a98bfeSMaxime Ripard                    reg = <1>;
199f5a98bfeSMaxime Ripard                    remote-endpoint = <&fe1_out_be0>;
200f5a98bfeSMaxime Ripard                };
201f5a98bfeSMaxime Ripard            };
202f5a98bfeSMaxime Ripard
203f5a98bfeSMaxime Ripard            port@1 {
204f5a98bfeSMaxime Ripard                #address-cells = <1>;
205f5a98bfeSMaxime Ripard                #size-cells = <0>;
206f5a98bfeSMaxime Ripard                reg = <1>;
207f5a98bfeSMaxime Ripard
208f5a98bfeSMaxime Ripard                endpoint@0 {
209f5a98bfeSMaxime Ripard                    reg = <0>;
210f5a98bfeSMaxime Ripard                    remote-endpoint = <&tcon0_in_be0>;
211f5a98bfeSMaxime Ripard                };
212f5a98bfeSMaxime Ripard
213f5a98bfeSMaxime Ripard                endpoint@1 {
214f5a98bfeSMaxime Ripard                    reg = <1>;
215f5a98bfeSMaxime Ripard                    remote-endpoint = <&tcon1_in_be0>;
216f5a98bfeSMaxime Ripard                };
217f5a98bfeSMaxime Ripard            };
218f5a98bfeSMaxime Ripard        };
219f5a98bfeSMaxime Ripard    };
220f5a98bfeSMaxime Ripard
221f5a98bfeSMaxime Ripard  - |
222f5a98bfeSMaxime Ripard    #include <dt-bindings/interrupt-controller/arm-gic.h>
223f5a98bfeSMaxime Ripard
224f5a98bfeSMaxime Ripard    /*
225f5a98bfeSMaxime Ripard     * This comes from the clock/sun8i-a23-a33-ccu.h and
226f5a98bfeSMaxime Ripard     * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
227f5a98bfeSMaxime Ripard     * since it would trigger a bunch of warnings for redefinitions of
228f5a98bfeSMaxime Ripard     * symbols with the other example.
229f5a98bfeSMaxime Ripard     */
230f5a98bfeSMaxime Ripard
231f5a98bfeSMaxime Ripard    #define CLK_BUS_DE_BE	40
232f5a98bfeSMaxime Ripard    #define CLK_BUS_SAT		46
233f5a98bfeSMaxime Ripard    #define CLK_DRAM_DE_BE	84
234f5a98bfeSMaxime Ripard    #define CLK_DE_BE		85
235f5a98bfeSMaxime Ripard    #define RST_BUS_DE_BE	21
236f5a98bfeSMaxime Ripard    #define RST_BUS_SAT		27
237f5a98bfeSMaxime Ripard
238f5a98bfeSMaxime Ripard    display-backend@1e60000 {
239f5a98bfeSMaxime Ripard        compatible = "allwinner,sun8i-a33-display-backend";
240f5a98bfeSMaxime Ripard        reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
241f5a98bfeSMaxime Ripard        reg-names = "be", "sat";
242f5a98bfeSMaxime Ripard        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
243f5a98bfeSMaxime Ripard        clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
244f5a98bfeSMaxime Ripard                 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
245f5a98bfeSMaxime Ripard        clock-names = "ahb", "mod",
246f5a98bfeSMaxime Ripard                      "ram", "sat";
247f5a98bfeSMaxime Ripard        resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
248f5a98bfeSMaxime Ripard        reset-names = "be", "sat";
249f5a98bfeSMaxime Ripard
250f5a98bfeSMaxime Ripard        ports {
251f5a98bfeSMaxime Ripard            #address-cells = <1>;
252f5a98bfeSMaxime Ripard            #size-cells = <0>;
253f5a98bfeSMaxime Ripard
254f5a98bfeSMaxime Ripard            port@0 {
255f5a98bfeSMaxime Ripard                reg = <0>;
256f5a98bfeSMaxime Ripard
257f5a98bfeSMaxime Ripard                endpoint {
258f5a98bfeSMaxime Ripard                    remote-endpoint = <&fe0_out_be0>;
259f5a98bfeSMaxime Ripard                };
260f5a98bfeSMaxime Ripard            };
261f5a98bfeSMaxime Ripard
262f5a98bfeSMaxime Ripard            port@1 {
263f5a98bfeSMaxime Ripard                reg = <1>;
264f5a98bfeSMaxime Ripard
265f5a98bfeSMaxime Ripard                endpoint {
266f5a98bfeSMaxime Ripard                    remote-endpoint = <&drc0_in_be0>;
267f5a98bfeSMaxime Ripard                };
268f5a98bfeSMaxime Ripard            };
269f5a98bfeSMaxime Ripard        };
270f5a98bfeSMaxime Ripard    };
271f5a98bfeSMaxime Ripard
272f5a98bfeSMaxime Ripard...
273