1f5a98bfeSMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2f5a98bfeSMaxime Ripard%YAML 1.2
3f5a98bfeSMaxime Ripard---
4f5a98bfeSMaxime Ripard$id: http://devicetree.org/schemas/display/allwinner,sun9i-a80-deu.yaml#
5f5a98bfeSMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6f5a98bfeSMaxime Ripard
7f5a98bfeSMaxime Ripardtitle: Allwinner A80 Detail Enhancement Unit Device Tree Bindings
8f5a98bfeSMaxime Ripard
9f5a98bfeSMaxime Ripardmaintainers:
10f5a98bfeSMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11f5a98bfeSMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12f5a98bfeSMaxime Ripard
13f5a98bfeSMaxime Riparddescription: |
14f5a98bfeSMaxime Ripard  The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC,
15f5a98bfeSMaxime Ripard  can sharpen the display content in both luma and chroma channels.
16f5a98bfeSMaxime Ripard
17f5a98bfeSMaxime Ripardproperties:
18f5a98bfeSMaxime Ripard  compatible:
19f5a98bfeSMaxime Ripard    const: allwinner,sun9i-a80-deu
20f5a98bfeSMaxime Ripard
21f5a98bfeSMaxime Ripard  reg:
22f5a98bfeSMaxime Ripard    maxItems: 1
23f5a98bfeSMaxime Ripard
24f5a98bfeSMaxime Ripard  interrupts:
25f5a98bfeSMaxime Ripard    maxItems: 1
26f5a98bfeSMaxime Ripard
27f5a98bfeSMaxime Ripard  clocks:
28f5a98bfeSMaxime Ripard    items:
29f5a98bfeSMaxime Ripard      - description: The DEU interface clock
30f5a98bfeSMaxime Ripard      - description: The DEU module clock
31f5a98bfeSMaxime Ripard      - description: The DEU DRAM clock
32f5a98bfeSMaxime Ripard
33f5a98bfeSMaxime Ripard  clock-names:
34f5a98bfeSMaxime Ripard    items:
35f5a98bfeSMaxime Ripard      - const: ahb
36f5a98bfeSMaxime Ripard      - const: mod
37f5a98bfeSMaxime Ripard      - const: ram
38f5a98bfeSMaxime Ripard
39f5a98bfeSMaxime Ripard  resets:
40f5a98bfeSMaxime Ripard    maxItems: 1
41f5a98bfeSMaxime Ripard
42f5a98bfeSMaxime Ripard  ports:
43f5a98bfeSMaxime Ripard    type: object
44f5a98bfeSMaxime Ripard    description: |
45f5a98bfeSMaxime Ripard      A ports node with endpoint definitions as defined in
46f5a98bfeSMaxime Ripard      Documentation/devicetree/bindings/media/video-interfaces.txt.
47f5a98bfeSMaxime Ripard
48f5a98bfeSMaxime Ripard    properties:
49f5a98bfeSMaxime Ripard      "#address-cells":
50f5a98bfeSMaxime Ripard        const: 1
51f5a98bfeSMaxime Ripard
52f5a98bfeSMaxime Ripard      "#size-cells":
53f5a98bfeSMaxime Ripard        const: 0
54f5a98bfeSMaxime Ripard
55f5a98bfeSMaxime Ripard      port@0:
56f5a98bfeSMaxime Ripard        type: object
57f5a98bfeSMaxime Ripard        description: |
58f5a98bfeSMaxime Ripard          Input endpoints of the controller.
59f5a98bfeSMaxime Ripard
60f5a98bfeSMaxime Ripard      port@1:
61f5a98bfeSMaxime Ripard        type: object
62f5a98bfeSMaxime Ripard        description: |
63f5a98bfeSMaxime Ripard          Output endpoints of the controller.
64f5a98bfeSMaxime Ripard
65f5a98bfeSMaxime Ripard    required:
66f5a98bfeSMaxime Ripard      - "#address-cells"
67f5a98bfeSMaxime Ripard      - "#size-cells"
68f5a98bfeSMaxime Ripard      - port@0
69f5a98bfeSMaxime Ripard      - port@1
70f5a98bfeSMaxime Ripard
71f5a98bfeSMaxime Ripard    additionalProperties: false
72f5a98bfeSMaxime Ripard
73f5a98bfeSMaxime Ripardrequired:
74f5a98bfeSMaxime Ripard  - compatible
75f5a98bfeSMaxime Ripard  - reg
76f5a98bfeSMaxime Ripard  - interrupts
77f5a98bfeSMaxime Ripard  - clocks
78f5a98bfeSMaxime Ripard  - clock-names
79f5a98bfeSMaxime Ripard  - resets
80f5a98bfeSMaxime Ripard  - ports
81f5a98bfeSMaxime Ripard
82f5a98bfeSMaxime RipardadditionalProperties: false
83f5a98bfeSMaxime Ripard
84f5a98bfeSMaxime Ripardexamples:
85f5a98bfeSMaxime Ripard  - |
86f5a98bfeSMaxime Ripard    #include <dt-bindings/interrupt-controller/arm-gic.h>
87f5a98bfeSMaxime Ripard
88f5a98bfeSMaxime Ripard    #include <dt-bindings/clock/sun9i-a80-de.h>
89f5a98bfeSMaxime Ripard    #include <dt-bindings/reset/sun9i-a80-de.h>
90f5a98bfeSMaxime Ripard
91f5a98bfeSMaxime Ripard    deu0: deu@3300000 {
92f5a98bfeSMaxime Ripard        compatible = "allwinner,sun9i-a80-deu";
93f5a98bfeSMaxime Ripard        reg = <0x03300000 0x40000>;
94f5a98bfeSMaxime Ripard        interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
95f5a98bfeSMaxime Ripard        clocks = <&de_clocks CLK_BUS_DEU0>,
96f5a98bfeSMaxime Ripard                 <&de_clocks CLK_IEP_DEU0>,
97f5a98bfeSMaxime Ripard                 <&de_clocks CLK_DRAM_DEU0>;
98f5a98bfeSMaxime Ripard        clock-names = "ahb",
99f5a98bfeSMaxime Ripard                      "mod",
100f5a98bfeSMaxime Ripard                      "ram";
101f5a98bfeSMaxime Ripard        resets = <&de_clocks RST_DEU0>;
102f5a98bfeSMaxime Ripard
103f5a98bfeSMaxime Ripard        ports {
104f5a98bfeSMaxime Ripard            #address-cells = <1>;
105f5a98bfeSMaxime Ripard            #size-cells = <0>;
106f5a98bfeSMaxime Ripard
107f5a98bfeSMaxime Ripard            deu0_in: port@0 {
108f5a98bfeSMaxime Ripard                reg = <0>;
109f5a98bfeSMaxime Ripard
110f5a98bfeSMaxime Ripard                deu0_in_fe0: endpoint {
111f5a98bfeSMaxime Ripard                    remote-endpoint = <&fe0_out_deu0>;
112f5a98bfeSMaxime Ripard                };
113f5a98bfeSMaxime Ripard            };
114f5a98bfeSMaxime Ripard
115f5a98bfeSMaxime Ripard            deu0_out: port@1 {
116f5a98bfeSMaxime Ripard                #address-cells = <1>;
117f5a98bfeSMaxime Ripard                #size-cells = <0>;
118f5a98bfeSMaxime Ripard                reg = <1>;
119f5a98bfeSMaxime Ripard
120f5a98bfeSMaxime Ripard                deu0_out_be0: endpoint@0 {
121f5a98bfeSMaxime Ripard                    reg = <0>;
122f5a98bfeSMaxime Ripard                    remote-endpoint = <&be0_in_deu0>;
123f5a98bfeSMaxime Ripard                };
124f5a98bfeSMaxime Ripard
125f5a98bfeSMaxime Ripard                deu0_out_be1: endpoint@1 {
126f5a98bfeSMaxime Ripard                    reg = <1>;
127f5a98bfeSMaxime Ripard                    remote-endpoint = <&be1_in_deu0>;
128f5a98bfeSMaxime Ripard                };
129f5a98bfeSMaxime Ripard            };
130f5a98bfeSMaxime Ripard        };
131f5a98bfeSMaxime Ripard    };
132f5a98bfeSMaxime Ripard
133f5a98bfeSMaxime Ripard...
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