1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner R40 TCON TOP Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13description: |
14  TCON TOPs main purpose is to configure whole display pipeline. It
15  determines relationships between mixers and TCONs, selects source
16  TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17  encoder clock source and contains additional TV TCON and DSI gates.
18
19  It allows display pipeline to be configured in very different ways:
20
21                                  / LCD0/LVDS0
22                   / [0] TCON-LCD0
23                   |              \ MIPI DSI
24   mixer0          |
25          \        / [1] TCON-LCD1 - LCD1/LVDS1
26           TCON-TOP
27          /        \ [2] TCON-TV0 [0] - TVE0/RGB
28   mixer1          |                  \
29                   |                   TCON-TOP - HDMI
30                   |                  /
31                   \ [3] TCON-TV1 [1] - TVE1/RGB
32
33  Note that both TCON TOP references same physical unit. Both mixers
34  can be connected to any TCON. Not all TCON TOP variants support all
35  features.
36
37properties:
38  "#clock-cells":
39    const: 1
40
41  compatible:
42    enum:
43      - allwinner,sun8i-r40-tcon-top
44      - allwinner,sun50i-h6-tcon-top
45
46  reg:
47    maxItems: 1
48
49  clocks:
50    minItems: 2
51    maxItems: 6
52
53  clock-names:
54    minItems: 2
55    maxItems: 6
56
57  clock-output-names:
58    minItems: 1
59    maxItems: 3
60
61  resets:
62    maxItems: 1
63
64  ports:
65    $ref: /schemas/graph.yaml#/properties/ports
66
67    properties:
68      port@0:
69        $ref: /schemas/graph.yaml#/properties/port
70        description: |
71          Input endpoint for Mixer 0 mux.
72
73      port@1:
74        $ref: /schemas/graph.yaml#/properties/port
75        description: |
76          Output endpoint for Mixer 0 mux
77
78      port@2:
79        $ref: /schemas/graph.yaml#/properties/port
80        description: |
81          Input endpoint for Mixer 1 mux.
82
83      port@3:
84        $ref: /schemas/graph.yaml#/properties/port
85        description: |
86          Output endpoint for Mixer 1 mux
87
88      port@4:
89        $ref: /schemas/graph.yaml#/properties/port
90        description: |
91          Input endpoint for HDMI mux.
92
93      port@5:
94        $ref: /schemas/graph.yaml#/properties/port
95        description: |
96          Output endpoint for HDMI mux
97
98    required:
99      - port@0
100      - port@1
101      - port@4
102      - port@5
103
104required:
105  - "#clock-cells"
106  - compatible
107  - reg
108  - clocks
109  - clock-names
110  - clock-output-names
111  - resets
112  - ports
113
114additionalProperties: false
115
116allOf:
117  - if:
118      properties:
119        compatible:
120          contains:
121            const: allwinner,sun8i-r40-tcon-top
122
123    then:
124      properties:
125        clocks:
126          items:
127            - description: The TCON TOP interface clock
128            - description: The TCON TOP TV0 clock
129            - description: The TCON TOP TVE0 clock
130            - description: The TCON TOP TV1 clock
131            - description: The TCON TOP TVE1 clock
132            - description: The TCON TOP MIPI DSI clock
133
134        clock-names:
135          items:
136            - const: bus
137            - const: tcon-tv0
138            - const: tve0
139            - const: tcon-tv1
140            - const: tve1
141            - const: dsi
142
143        clock-output-names:
144          items:
145            - description: TCON TV0 output clock name
146            - description: TCON TV1 output clock name
147            - description: DSI output clock name
148
149        ports:
150          required:
151            - port@2
152            - port@3
153
154  - if:
155      properties:
156        compatible:
157          contains:
158            const: allwinner,sun50i-h6-tcon-top
159
160    then:
161      properties:
162        clocks:
163          items:
164            - description: The TCON TOP interface clock
165            - description: The TCON TOP TV0 clock
166
167        clock-names:
168          items:
169            - const: bus
170            - const: tcon-tv0
171
172        clock-output-names:
173          items:
174            - description: TCON TV0 output clock name
175
176examples:
177  - |
178    #include <dt-bindings/interrupt-controller/arm-gic.h>
179
180    #include <dt-bindings/clock/sun8i-r40-ccu.h>
181    #include <dt-bindings/reset/sun8i-r40-ccu.h>
182
183      tcon_top: tcon-top@1c70000 {
184          compatible = "allwinner,sun8i-r40-tcon-top";
185          reg = <0x01c70000 0x1000>;
186          clocks = <&ccu CLK_BUS_TCON_TOP>,
187                   <&ccu CLK_TCON_TV0>,
188                   <&ccu CLK_TVE0>,
189                   <&ccu CLK_TCON_TV1>,
190                   <&ccu CLK_TVE1>,
191                   <&ccu CLK_DSI_DPHY>;
192          clock-names = "bus",
193                        "tcon-tv0",
194                        "tve0",
195                        "tcon-tv1",
196                        "tve1",
197                        "dsi";
198          clock-output-names = "tcon-top-tv0",
199                               "tcon-top-tv1",
200                               "tcon-top-dsi";
201          resets = <&ccu RST_BUS_TCON_TOP>;
202          #clock-cells = <1>;
203
204          ports {
205              #address-cells = <1>;
206              #size-cells = <0>;
207
208              tcon_top_mixer0_in: port@0 {
209                  reg = <0>;
210
211                  tcon_top_mixer0_in_mixer0: endpoint {
212                      remote-endpoint = <&mixer0_out_tcon_top>;
213                  };
214              };
215
216              tcon_top_mixer0_out: port@1 {
217                  #address-cells = <1>;
218                  #size-cells = <0>;
219                  reg = <1>;
220
221                  tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
222                      reg = <0>;
223                  };
224
225                  tcon_top_mixer0_out_tcon_lcd1: endpoint@1 {
226                      reg = <1>;
227                  };
228
229                  tcon_top_mixer0_out_tcon_tv0: endpoint@2 {
230                      reg = <2>;
231                      remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
232                  };
233
234                  tcon_top_mixer0_out_tcon_tv1: endpoint@3 {
235                      reg = <3>;
236                      remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
237                  };
238              };
239
240              tcon_top_mixer1_in: port@2 {
241                  #address-cells = <1>;
242                  #size-cells = <0>;
243                  reg = <2>;
244
245                  tcon_top_mixer1_in_mixer1: endpoint@1 {
246                      reg = <1>;
247                      remote-endpoint = <&mixer1_out_tcon_top>;
248                  };
249              };
250
251              tcon_top_mixer1_out: port@3 {
252                  #address-cells = <1>;
253                  #size-cells = <0>;
254                  reg = <3>;
255
256                  tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
257                      reg = <0>;
258                  };
259
260                  tcon_top_mixer1_out_tcon_lcd1: endpoint@1 {
261                      reg = <1>;
262                  };
263
264                  tcon_top_mixer1_out_tcon_tv0: endpoint@2 {
265                      reg = <2>;
266                      remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
267                  };
268
269                  tcon_top_mixer1_out_tcon_tv1: endpoint@3 {
270                      reg = <3>;
271                      remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
272                  };
273              };
274
275              tcon_top_hdmi_in: port@4 {
276                  #address-cells = <1>;
277                  #size-cells = <0>;
278                  reg = <4>;
279
280                  tcon_top_hdmi_in_tcon_tv0: endpoint@0 {
281                      reg = <0>;
282                      remote-endpoint = <&tcon_tv0_out_tcon_top>;
283                  };
284
285                  tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
286                      reg = <1>;
287                      remote-endpoint = <&tcon_tv1_out_tcon_top>;
288                  };
289              };
290
291              tcon_top_hdmi_out: port@5 {
292                  reg = <5>;
293
294                  tcon_top_hdmi_out_hdmi: endpoint {
295                      remote-endpoint = <&hdmi_in_tcon_top>;
296                  };
297              };
298          };
299      };
300
301...
302