1ceced4acSBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2ceced4acSBenjamin Gaignard%YAML 1.2
3ceced4acSBenjamin Gaignard---
4ceced4acSBenjamin Gaignard$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
5ceced4acSBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml#
6ceced4acSBenjamin Gaignard
7ceced4acSBenjamin Gaignardtitle: STMicroelectronics STM32 HASH bindings
8ceced4acSBenjamin Gaignard
9ceced4acSBenjamin Gaignardmaintainers:
10ceced4acSBenjamin Gaignard  - Lionel Debieve <lionel.debieve@st.com>
11ceced4acSBenjamin Gaignard
12ceced4acSBenjamin Gaignardproperties:
13ceced4acSBenjamin Gaignard  compatible:
14ceced4acSBenjamin Gaignard    enum:
15ceced4acSBenjamin Gaignard      - st,stm32f456-hash
16ceced4acSBenjamin Gaignard      - st,stm32f756-hash
17ceced4acSBenjamin Gaignard
18ceced4acSBenjamin Gaignard  reg:
19ceced4acSBenjamin Gaignard    maxItems: 1
20ceced4acSBenjamin Gaignard
21ceced4acSBenjamin Gaignard  clocks:
22ceced4acSBenjamin Gaignard    maxItems: 1
23ceced4acSBenjamin Gaignard
24ceced4acSBenjamin Gaignard  interrupts:
25ceced4acSBenjamin Gaignard    maxItems: 1
26ceced4acSBenjamin Gaignard
27ceced4acSBenjamin Gaignard  resets:
28ceced4acSBenjamin Gaignard    maxItems: 1
29ceced4acSBenjamin Gaignard
30ceced4acSBenjamin Gaignard  dmas:
31ceced4acSBenjamin Gaignard    maxItems: 1
32ceced4acSBenjamin Gaignard
33ceced4acSBenjamin Gaignard  dma-names:
34ceced4acSBenjamin Gaignard    items:
35ceced4acSBenjamin Gaignard      - const: in
36ceced4acSBenjamin Gaignard
37ceced4acSBenjamin Gaignard  dma-maxburst:
38ceced4acSBenjamin Gaignard    description: Set number of maximum dma burst supported
39ceced4acSBenjamin Gaignard    allOf:
40ceced4acSBenjamin Gaignard      - $ref: /schemas/types.yaml#/definitions/uint32
41ceced4acSBenjamin Gaignard      - minimum: 0
42ceced4acSBenjamin Gaignard      - maximum: 2
43ceced4acSBenjamin Gaignard      - default: 0
44ceced4acSBenjamin Gaignard
45ceced4acSBenjamin Gaignardrequired:
46ceced4acSBenjamin Gaignard  - compatible
47ceced4acSBenjamin Gaignard  - reg
48ceced4acSBenjamin Gaignard  - clocks
49ceced4acSBenjamin Gaignard  - interrupts
50ceced4acSBenjamin Gaignard
51ceced4acSBenjamin GaignardadditionalProperties: false
52ceced4acSBenjamin Gaignard
53ceced4acSBenjamin Gaignardexamples:
54ceced4acSBenjamin Gaignard  - |
55ceced4acSBenjamin Gaignard    #include <dt-bindings/interrupt-controller/arm-gic.h>
56ceced4acSBenjamin Gaignard    #include <dt-bindings/clock/stm32mp1-clks.h>
57ceced4acSBenjamin Gaignard    #include <dt-bindings/reset/stm32mp1-resets.h>
58ceced4acSBenjamin Gaignard    hash@54002000 {
59ceced4acSBenjamin Gaignard      compatible = "st,stm32f756-hash";
60ceced4acSBenjamin Gaignard      reg = <0x54002000 0x400>;
61ceced4acSBenjamin Gaignard      interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
62ceced4acSBenjamin Gaignard      clocks = <&rcc HASH1>;
63ceced4acSBenjamin Gaignard      resets = <&rcc HASH1_R>;
64ceced4acSBenjamin Gaignard      dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>;
65ceced4acSBenjamin Gaignard      dma-names = "in";
66ceced4acSBenjamin Gaignard      dma-maxburst = <2>;
67ceced4acSBenjamin Gaignard    };
68ceced4acSBenjamin Gaignard
69ceced4acSBenjamin Gaignard...
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