1ceced4acSBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ceced4acSBenjamin Gaignard%YAML 1.2 3ceced4acSBenjamin Gaignard--- 4ceced4acSBenjamin Gaignard$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml# 5ceced4acSBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 6ceced4acSBenjamin Gaignard 784e85359SKrzysztof Kozlowskititle: STMicroelectronics STM32 HASH 8ceced4acSBenjamin Gaignard 9*85f3fc54SLinus Walleijdescription: The STM32 HASH block is built on the HASH block found in 10*85f3fc54SLinus Walleij the STn8820 SoC introduced in 2007, and subsequently used in the U8500 11*85f3fc54SLinus Walleij SoC in 2010. 12*85f3fc54SLinus Walleij 13ceced4acSBenjamin Gaignardmaintainers: 14f4eedebdSPatrice Chotard - Lionel Debieve <lionel.debieve@foss.st.com> 15ceced4acSBenjamin Gaignard 16ceced4acSBenjamin Gaignardproperties: 17ceced4acSBenjamin Gaignard compatible: 18ceced4acSBenjamin Gaignard enum: 19*85f3fc54SLinus Walleij - st,stn8820-hash 20*85f3fc54SLinus Walleij - stericsson,ux500-hash 21ceced4acSBenjamin Gaignard - st,stm32f456-hash 22ceced4acSBenjamin Gaignard - st,stm32f756-hash 23ceced4acSBenjamin Gaignard 24ceced4acSBenjamin Gaignard reg: 25ceced4acSBenjamin Gaignard maxItems: 1 26ceced4acSBenjamin Gaignard 27ceced4acSBenjamin Gaignard clocks: 28ceced4acSBenjamin Gaignard maxItems: 1 29ceced4acSBenjamin Gaignard 30ceced4acSBenjamin Gaignard interrupts: 31ceced4acSBenjamin Gaignard maxItems: 1 32ceced4acSBenjamin Gaignard 33ceced4acSBenjamin Gaignard resets: 34ceced4acSBenjamin Gaignard maxItems: 1 35ceced4acSBenjamin Gaignard 36ceced4acSBenjamin Gaignard dmas: 37ceced4acSBenjamin Gaignard maxItems: 1 38ceced4acSBenjamin Gaignard 39ceced4acSBenjamin Gaignard dma-names: 40ceced4acSBenjamin Gaignard items: 41ceced4acSBenjamin Gaignard - const: in 42ceced4acSBenjamin Gaignard 43ceced4acSBenjamin Gaignard dma-maxburst: 44ceced4acSBenjamin Gaignard description: Set number of maximum dma burst supported 453d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 463d21a460SRob Herring minimum: 0 473d21a460SRob Herring maximum: 2 483d21a460SRob Herring default: 0 49ceced4acSBenjamin Gaignard 50*85f3fc54SLinus Walleij power-domains: 51*85f3fc54SLinus Walleij maxItems: 1 52*85f3fc54SLinus Walleij 53ceced4acSBenjamin Gaignardrequired: 54ceced4acSBenjamin Gaignard - compatible 55ceced4acSBenjamin Gaignard - reg 56ceced4acSBenjamin Gaignard - clocks 57*85f3fc54SLinus Walleij 58*85f3fc54SLinus WalleijallOf: 59*85f3fc54SLinus Walleij - if: 60*85f3fc54SLinus Walleij properties: 61*85f3fc54SLinus Walleij compatible: 62*85f3fc54SLinus Walleij items: 63*85f3fc54SLinus Walleij const: stericsson,ux500-hash 64*85f3fc54SLinus Walleij then: 65*85f3fc54SLinus Walleij properties: 66*85f3fc54SLinus Walleij interrupts: false 67*85f3fc54SLinus Walleij else: 68*85f3fc54SLinus Walleij required: 69ceced4acSBenjamin Gaignard - interrupts 70ceced4acSBenjamin Gaignard 71ceced4acSBenjamin GaignardadditionalProperties: false 72ceced4acSBenjamin Gaignard 73ceced4acSBenjamin Gaignardexamples: 74ceced4acSBenjamin Gaignard - | 75ceced4acSBenjamin Gaignard #include <dt-bindings/interrupt-controller/arm-gic.h> 76ceced4acSBenjamin Gaignard #include <dt-bindings/clock/stm32mp1-clks.h> 77ceced4acSBenjamin Gaignard #include <dt-bindings/reset/stm32mp1-resets.h> 78ceced4acSBenjamin Gaignard hash@54002000 { 79ceced4acSBenjamin Gaignard compatible = "st,stm32f756-hash"; 80ceced4acSBenjamin Gaignard reg = <0x54002000 0x400>; 81ceced4acSBenjamin Gaignard interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 82ceced4acSBenjamin Gaignard clocks = <&rcc HASH1>; 83ceced4acSBenjamin Gaignard resets = <&rcc HASH1_R>; 84ceced4acSBenjamin Gaignard dmas = <&mdma1 31 0x10 0x1000A02 0x0 0x0>; 85ceced4acSBenjamin Gaignard dma-names = "in"; 86ceced4acSBenjamin Gaignard dma-maxburst = <2>; 87ceced4acSBenjamin Gaignard }; 88ceced4acSBenjamin Gaignard 89ceced4acSBenjamin Gaignard... 90