1*c7e34aa3SDaniele Alessandrelli# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c7e34aa3SDaniele Alessandrelli%YAML 1.2 3*c7e34aa3SDaniele Alessandrelli--- 4*c7e34aa3SDaniele Alessandrelli$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml# 5*c7e34aa3SDaniele Alessandrelli$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c7e34aa3SDaniele Alessandrelli 7*c7e34aa3SDaniele Alessandrellititle: Intel Keem Bay OCS AES Device Tree Bindings 8*c7e34aa3SDaniele Alessandrelli 9*c7e34aa3SDaniele Alessandrellimaintainers: 10*c7e34aa3SDaniele Alessandrelli - Daniele Alessandrelli <daniele.alessandrelli@intel.com> 11*c7e34aa3SDaniele Alessandrelli 12*c7e34aa3SDaniele Alessandrellidescription: 13*c7e34aa3SDaniele Alessandrelli The Intel Keem Bay Offload and Crypto Subsystem (OCS) AES engine provides 14*c7e34aa3SDaniele Alessandrelli hardware-accelerated AES/SM4 encryption/decryption. 15*c7e34aa3SDaniele Alessandrelli 16*c7e34aa3SDaniele Alessandrelliproperties: 17*c7e34aa3SDaniele Alessandrelli compatible: 18*c7e34aa3SDaniele Alessandrelli const: intel,keembay-ocs-aes 19*c7e34aa3SDaniele Alessandrelli 20*c7e34aa3SDaniele Alessandrelli reg: 21*c7e34aa3SDaniele Alessandrelli maxItems: 1 22*c7e34aa3SDaniele Alessandrelli 23*c7e34aa3SDaniele Alessandrelli interrupts: 24*c7e34aa3SDaniele Alessandrelli maxItems: 1 25*c7e34aa3SDaniele Alessandrelli 26*c7e34aa3SDaniele Alessandrelli clocks: 27*c7e34aa3SDaniele Alessandrelli maxItems: 1 28*c7e34aa3SDaniele Alessandrelli 29*c7e34aa3SDaniele Alessandrellirequired: 30*c7e34aa3SDaniele Alessandrelli - compatible 31*c7e34aa3SDaniele Alessandrelli - reg 32*c7e34aa3SDaniele Alessandrelli - interrupts 33*c7e34aa3SDaniele Alessandrelli - clocks 34*c7e34aa3SDaniele Alessandrelli 35*c7e34aa3SDaniele AlessandrelliadditionalProperties: false 36*c7e34aa3SDaniele Alessandrelli 37*c7e34aa3SDaniele Alessandrelliexamples: 38*c7e34aa3SDaniele Alessandrelli - | 39*c7e34aa3SDaniele Alessandrelli #include <dt-bindings/interrupt-controller/arm-gic.h> 40*c7e34aa3SDaniele Alessandrelli crypto@30008000 { 41*c7e34aa3SDaniele Alessandrelli compatible = "intel,keembay-ocs-aes"; 42*c7e34aa3SDaniele Alessandrelli reg = <0x30008000 0x1000>; 43*c7e34aa3SDaniele Alessandrelli interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 44*c7e34aa3SDaniele Alessandrelli clocks = <&scmi_clk 95>; 45*c7e34aa3SDaniele Alessandrelli }; 46