1Inside Secure SafeXcel cryptographic engine 2 3Required properties: 4- compatible: Should be "inside-secure,safexcel-eip197" or 5 "inside-secure,safexcel-eip97". 6- reg: Base physical address of the engine and length of memory mapped region. 7- interrupts: Interrupt numbers for the rings and engine. 8- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". 9 10Optional properties: 11- clocks: Reference to the crypto engine clocks, the second clock is 12 needed for the Armada 7K/8K SoCs. 13- clock-names: mandatory if there is a second clock, in this case the 14 name must be "core" for the first clock and "reg" for 15 the second one. 16 17Example: 18 19 crypto: crypto@800000 { 20 compatible = "inside-secure,safexcel-eip197"; 21 reg = <0x800000 0x200000>; 22 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 23 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 24 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 25 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 26 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 27 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 28 interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3", 29 "eip"; 30 clocks = <&cpm_syscon0 1 26>; 31 }; 32