1*44c75c9eSTudor Ambarus# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*44c75c9eSTudor Ambarus# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries 3*44c75c9eSTudor Ambarus%YAML 1.2 4*44c75c9eSTudor Ambarus--- 5*44c75c9eSTudor Ambarus$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-sha.yaml# 6*44c75c9eSTudor Ambarus$schema: http://devicetree.org/meta-schemas/core.yaml# 7*44c75c9eSTudor Ambarus 8*44c75c9eSTudor Ambarustitle: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator 9*44c75c9eSTudor Ambarus 10*44c75c9eSTudor Ambarusmaintainers: 11*44c75c9eSTudor Ambarus - Tudor Ambarus <tudor.ambarus@microchip.com> 12*44c75c9eSTudor Ambarus 13*44c75c9eSTudor Ambarusproperties: 14*44c75c9eSTudor Ambarus compatible: 15*44c75c9eSTudor Ambarus const: atmel,at91sam9g46-sha 16*44c75c9eSTudor Ambarus 17*44c75c9eSTudor Ambarus reg: 18*44c75c9eSTudor Ambarus maxItems: 1 19*44c75c9eSTudor Ambarus 20*44c75c9eSTudor Ambarus interrupts: 21*44c75c9eSTudor Ambarus maxItems: 1 22*44c75c9eSTudor Ambarus 23*44c75c9eSTudor Ambarus clocks: 24*44c75c9eSTudor Ambarus maxItems: 1 25*44c75c9eSTudor Ambarus 26*44c75c9eSTudor Ambarus clock-names: 27*44c75c9eSTudor Ambarus const: sha_clk 28*44c75c9eSTudor Ambarus 29*44c75c9eSTudor Ambarus dmas: 30*44c75c9eSTudor Ambarus maxItems: 1 31*44c75c9eSTudor Ambarus description: TX DMA Channel 32*44c75c9eSTudor Ambarus 33*44c75c9eSTudor Ambarus dma-names: 34*44c75c9eSTudor Ambarus const: tx 35*44c75c9eSTudor Ambarus 36*44c75c9eSTudor Ambarusrequired: 37*44c75c9eSTudor Ambarus - compatible 38*44c75c9eSTudor Ambarus - reg 39*44c75c9eSTudor Ambarus - interrupts 40*44c75c9eSTudor Ambarus - clocks 41*44c75c9eSTudor Ambarus - clock-names 42*44c75c9eSTudor Ambarus 43*44c75c9eSTudor AmbarusadditionalProperties: false 44*44c75c9eSTudor Ambarus 45*44c75c9eSTudor Ambarusexamples: 46*44c75c9eSTudor Ambarus - | 47*44c75c9eSTudor Ambarus #include <dt-bindings/interrupt-controller/irq.h> 48*44c75c9eSTudor Ambarus #include <dt-bindings/interrupt-controller/arm-gic.h> 49*44c75c9eSTudor Ambarus #include <dt-bindings/clock/at91.h> 50*44c75c9eSTudor Ambarus #include <dt-bindings/dma/at91.h> 51*44c75c9eSTudor Ambarus 52*44c75c9eSTudor Ambarus sha: crypto@e1814000 { 53*44c75c9eSTudor Ambarus compatible = "atmel,at91sam9g46-sha"; 54*44c75c9eSTudor Ambarus reg = <0xe1814000 0x100>; 55*44c75c9eSTudor Ambarus interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 56*44c75c9eSTudor Ambarus clocks = <&pmc PMC_TYPE_PERIPHERAL 83>; 57*44c75c9eSTudor Ambarus clock-names = "sha_clk"; 58*44c75c9eSTudor Ambarus dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; 59*44c75c9eSTudor Ambarus dma-names = "tx"; 60*44c75c9eSTudor Ambarus }; 61