165a71007SKevin CernekeeCommon properties
265a71007SKevin Cernekee
3076fb0c4SFrank RowandThe Devicetree Specification does not define any properties related to hardware
465a71007SKevin Cernekeebyteswapping, but endianness issues show up frequently in porting Linux to
565a71007SKevin Cernekeedifferent machine types.  This document attempts to provide a consistent
665a71007SKevin Cernekeeway of handling byteswapping across drivers.
765a71007SKevin Cernekee
865a71007SKevin CernekeeOptional properties:
965a71007SKevin Cernekee - big-endian: Boolean; force big endian register accesses
1065a71007SKevin Cernekee   unconditionally (e.g. ioread32be/iowrite32be).  Use this if you
1165a71007SKevin Cernekee   know the peripheral always needs to be accessed in BE mode.
1265a71007SKevin Cernekee - little-endian: Boolean; force little endian register accesses
1365a71007SKevin Cernekee   unconditionally (e.g. readl/writel).  Use this if you know the
1465a71007SKevin Cernekee   peripheral always needs to be accessed in LE mode.
1565a71007SKevin Cernekee - native-endian: Boolean; always use register accesses matched to the
1665a71007SKevin Cernekee   endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
1765a71007SKevin Cernekee   BE vmlinux -> ioread32be/iowrite32be).  In this case no byteswaps
1865a71007SKevin Cernekee   will ever be performed.  Use this if the hardware "self-adjusts"
1965a71007SKevin Cernekee   register endianness based on the CPU's configured endianness.
2065a71007SKevin Cernekee
2165a71007SKevin CernekeeIf a binding supports these properties, then the binding should also
2265a71007SKevin Cernekeespecify the default behavior if none of these properties are present.
2365a71007SKevin CernekeeIn such cases, little-endian is the preferred default, but it is not
2465a71007SKevin Cernekeea requirement.  The of_device_is_big_endian() and of_fdt_is_big_endian()
2565a71007SKevin Cernekeehelper functions do assume that little-endian is the default, because
2665a71007SKevin Cernekeemost existing (PCI-based) drivers implicitly default to LE by using
2765a71007SKevin Cernekeereadl/writel for MMIO accesses.
2865a71007SKevin Cernekee
2965a71007SKevin CernekeeExamples:
3065a71007SKevin CernekeeScenario 1 : CPU in LE mode & device in LE mode.
3165a71007SKevin Cernekeedev: dev@40031000 {
3265a71007SKevin Cernekee	      compatible = "name";
3365a71007SKevin Cernekee	      reg = <0x40031000 0x1000>;
3465a71007SKevin Cernekee	      ...
3565a71007SKevin Cernekee	      native-endian;
3665a71007SKevin Cernekee};
3765a71007SKevin Cernekee
3865a71007SKevin CernekeeScenario 2 : CPU in LE mode & device in BE mode.
3965a71007SKevin Cernekeedev: dev@40031000 {
4065a71007SKevin Cernekee	      compatible = "name";
4165a71007SKevin Cernekee	      reg = <0x40031000 0x1000>;
4265a71007SKevin Cernekee	      ...
4365a71007SKevin Cernekee	      big-endian;
4465a71007SKevin Cernekee};
4565a71007SKevin Cernekee
4665a71007SKevin CernekeeScenario 3 : CPU in BE mode & device in BE mode.
4765a71007SKevin Cernekeedev: dev@40031000 {
4865a71007SKevin Cernekee	      compatible = "name";
4965a71007SKevin Cernekee	      reg = <0x40031000 0x1000>;
5065a71007SKevin Cernekee	      ...
5165a71007SKevin Cernekee	      native-endian;
5265a71007SKevin Cernekee};
5365a71007SKevin Cernekee
5465a71007SKevin CernekeeScenario 4 : CPU in BE mode & device in LE mode.
5565a71007SKevin Cernekeedev: dev@40031000 {
5665a71007SKevin Cernekee	      compatible = "name";
5765a71007SKevin Cernekee	      reg = <0x40031000 0x1000>;
5865a71007SKevin Cernekee	      ...
5965a71007SKevin Cernekee	      little-endian;
6065a71007SKevin Cernekee};
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