16a369c58STero KristoBinding for TI mux clock. 26a369c58STero Kristo 36a369c58STero KristoBinding status: Unstable - ABI compatibility may be broken in the future 46a369c58STero Kristo 56a369c58STero KristoThis binding uses the common clock binding[1]. It assumes a 66a369c58STero Kristoregister-mapped multiplexer with multiple input clock signals or 76a369c58STero Kristoparents, one of which can be selected as output. This clock does not 86a369c58STero Kristogate or adjust the parent rate via a divider or multiplier. 96a369c58STero Kristo 106a369c58STero KristoBy default the "clocks" property lists the parents in the same order 11*47aab533SBjorn Helgaasas they are programmed into the register. E.g: 126a369c58STero Kristo 136a369c58STero Kristo clocks = <&foo_clock>, <&bar_clock>, <&baz_clock>; 146a369c58STero Kristo 156a369c58STero Kristoresults in programming the register as follows: 166a369c58STero Kristo 176a369c58STero Kristoregister value selected parent clock 186a369c58STero Kristo0 foo_clock 196a369c58STero Kristo1 bar_clock 206a369c58STero Kristo2 baz_clock 216a369c58STero Kristo 226a369c58STero KristoSome clock controller IPs do not allow a value of zero to be programmed 236a369c58STero Kristointo the register, instead indexing begins at 1. The optional property 246a369c58STero Kristo"index-starts-at-one" modified the scheme as follows: 256a369c58STero Kristo 266a369c58STero Kristoregister value selected clock parent 276a369c58STero Kristo1 foo_clock 286a369c58STero Kristo2 bar_clock 296a369c58STero Kristo3 baz_clock 306a369c58STero Kristo 316a369c58STero KristoThe binding must provide the register to control the mux. Optionally 326a369c58STero Kristothe number of bits to shift the control field in the register can be 336a369c58STero Kristosupplied. If the shift value is missing it is the same as supplying 346a369c58STero Kristoa zero shift. 356a369c58STero Kristo 366a369c58STero Kristo[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 376a369c58STero Kristo 386a369c58STero KristoRequired properties: 396a369c58STero Kristo- compatible : shall be "ti,mux-clock" or "ti,composite-mux-clock". 406a369c58STero Kristo- #clock-cells : from common clock binding; shall be set to 0. 416a369c58STero Kristo- clocks : link phandles of parent clocks 426a369c58STero Kristo- reg : register offset for register controlling adjustable mux 436a369c58STero Kristo 446a369c58STero KristoOptional properties: 45fc3d39d5STony Lindgren- clock-output-names : from common clock binding. 466a369c58STero Kristo- ti,bit-shift : number of bits to shift the bit-mask, defaults to 476a369c58STero Kristo 0 if not present 486a369c58STero Kristo- ti,index-starts-at-one : valid input select programming starts at 1, not 496a369c58STero Kristo zero 506a369c58STero Kristo- ti,set-rate-parent : clk_set_rate is propagated to parent clock, 516a369c58STero Kristo not supported by the composite-mux-clock subtype 52be02637fSTero Kristo- ti,latch-bit : latch the mux value to HW, only needed if the register 53be02637fSTero Kristo access requires this. As an example, dra7x DPLL_GMAC H14 muxing 54be02637fSTero Kristo implements such behavior. 556a369c58STero Kristo 566a369c58STero KristoExamples: 576a369c58STero Kristo 586a369c58STero Kristosys_clkin_ck: sys_clkin_ck@4a306110 { 596a369c58STero Kristo #clock-cells = <0>; 606a369c58STero Kristo compatible = "ti,mux-clock"; 616a369c58STero Kristo clocks = <&virt_12000000_ck>, <&virt_13000000_ck>, <&virt_16800000_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_27000000_ck>, <&virt_38400000_ck>; 626a369c58STero Kristo reg = <0x0110>; 636a369c58STero Kristo ti,index-starts-at-one; 646a369c58STero Kristo}; 656a369c58STero Kristo 666a369c58STero Kristoabe_dpll_bypass_clk_mux_ck: abe_dpll_bypass_clk_mux_ck@4a306108 { 676a369c58STero Kristo #clock-cells = <0>; 686a369c58STero Kristo compatible = "ti,mux-clock"; 696a369c58STero Kristo clocks = <&sys_clkin_ck>, <&sys_32k_ck>; 706a369c58STero Kristo ti,bit-shift = <24>; 716a369c58STero Kristo reg = <0x0108>; 726a369c58STero Kristo}; 736a369c58STero Kristo 746a369c58STero Kristomcbsp5_mux_fck: mcbsp5_mux_fck { 756a369c58STero Kristo #clock-cells = <0>; 766a369c58STero Kristo compatible = "ti,composite-mux-clock"; 776a369c58STero Kristo clocks = <&core_96m_fck>, <&mcbsp_clks>; 786a369c58STero Kristo ti,bit-shift = <4>; 796a369c58STero Kristo reg = <0x02d8>; 806a369c58STero Kristo}; 81