121cdf726SDavid LechnerBinding for TI DaVinci Power Sleep Controller (PSC) 221cdf726SDavid Lechner 321cdf726SDavid LechnerThe PSC provides power management, clock gating and reset functionality. It is 421cdf726SDavid Lechnerprimarily used for clocking. 521cdf726SDavid Lechner 621cdf726SDavid LechnerRequired properties: 721cdf726SDavid Lechner- compatible: shall be one of: 821cdf726SDavid Lechner - "ti,da850-psc0" for PSC0 on DA850/OMAP-L138/AM18XX 921cdf726SDavid Lechner - "ti,da850-psc1" for PSC1 on DA850/OMAP-L138/AM18XX 1021cdf726SDavid Lechner- reg: physical base address and size of the controller's register area 1121cdf726SDavid Lechner- #clock-cells: from common clock binding; shall be set to 1 1221cdf726SDavid Lechner- #power-domain-cells: from generic power domain binding; shall be set to 1. 1321cdf726SDavid Lechner- clocks: phandles to clocks corresponding to the clock-names property 1421cdf726SDavid Lechner- clock-names: list of parent clock names - depends on compatible value 1521cdf726SDavid Lechner - for "ti,da850-psc0", shall be "pll0_sysclk1", "pll0_sysclk2", 1621cdf726SDavid Lechner "pll0_sysclk4", "pll0_sysclk6", "async1" 1721cdf726SDavid Lechner - for "ti,da850-psc1", shall be "pll0_sysclk2", "pll0_sysclk4", "async3" 1821cdf726SDavid Lechner 1921cdf726SDavid LechnerOptional properties: 2021cdf726SDavid Lechner- #reset-cells: from reset binding; shall be set to 1 - only applicable when 2121cdf726SDavid Lechner at least one local domain provides a local reset. 2221cdf726SDavid Lechner 2321cdf726SDavid LechnerConsumers: 2421cdf726SDavid Lechner 2521cdf726SDavid Lechner Clock, power domain and reset consumers shall use the local power domain 2621cdf726SDavid Lechner module ID (LPSC) as the index corresponding to the clock cell. Refer to 2721cdf726SDavid Lechner the device-specific datasheet to find these numbers. NB: Most local 2821cdf726SDavid Lechner domains only provide a clock/power domain and not a reset. 2921cdf726SDavid Lechner 3021cdf726SDavid LechnerExamples: 3121cdf726SDavid Lechner 3221cdf726SDavid Lechner psc0: clock-controller@10000 { 3321cdf726SDavid Lechner compatible = "ti,da850-psc0"; 3421cdf726SDavid Lechner reg = <0x10000 0x1000>; 3521cdf726SDavid Lechner #clock-cells = <1>; 3621cdf726SDavid Lechner #power-domain-cells = <1>; 3721cdf726SDavid Lechner #reset-cells = <1>; 3821cdf726SDavid Lechner clocks = <&pll0_sysclk 1>, <&pll0_sysclk 2>, 3921cdf726SDavid Lechner <&pll0_sysclk 4>, <&pll0_sysclk 6>, <&async1_clk>; 4021cdf726SDavid Lechner clock_names = "pll0_sysclk1", "pll0_sysclk2", 4121cdf726SDavid Lechner "pll0_sysclk4", "pll0_sysclk6", "async1"; 4221cdf726SDavid Lechner }; 4321cdf726SDavid Lechner psc1: clock-controller@227000 { 4421cdf726SDavid Lechner compatible = "ti,da850-psc1"; 4521cdf726SDavid Lechner reg = <0x227000 0x1000>; 4621cdf726SDavid Lechner #clock-cells = <1>; 4721cdf726SDavid Lechner #power-domain-cells = <1>; 4821cdf726SDavid Lechner clocks = <&pll0_sysclk 2>, <&pll0_sysclk 4>, <&async3_clk>; 4921cdf726SDavid Lechner clock_names = "pll0_sysclk2", "pll0_sysclk4", "async3"; 5021cdf726SDavid Lechner }; 5121cdf726SDavid Lechner 5221cdf726SDavid Lechner /* consumer */ 5321cdf726SDavid Lechner dsp: dsp@11800000 { 5421cdf726SDavid Lechner compatible = "ti,da850-dsp"; 5521cdf726SDavid Lechner reg = <0x11800000 0x40000>, 5621cdf726SDavid Lechner <0x11e00000 0x8000>, 5721cdf726SDavid Lechner <0x11f00000 0x8000>, 5821cdf726SDavid Lechner <0x01c14044 0x4>, 5921cdf726SDavid Lechner <0x01c14174 0x8>; 6021cdf726SDavid Lechner reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig"; 6121cdf726SDavid Lechner interrupt-parent = <&intc>; 6221cdf726SDavid Lechner interrupts = <28>; 6321cdf726SDavid Lechner clocks = <&psc0 15>; 6421cdf726SDavid Lechner power-domains = <&psc0 15>; 6521cdf726SDavid Lechner resets = <&psc0 15>; 6621cdf726SDavid Lechner }; 6721cdf726SDavid Lechner 6821cdf726SDavid LechnerAlso see: 6921cdf726SDavid Lechner- Documentation/devicetree/bindings/clock/clock-bindings.txt 7021cdf726SDavid Lechner- Documentation/devicetree/bindings/power/power_domain.txt 7121cdf726SDavid Lechner- Documentation/devicetree/bindings/reset/reset.txt 72