1STMicroelectronics STM32 Reset and Clock Controller
2===================================================
3
4The RCC IP is both a reset and a clock controller. This documentation only
5describes the clock part.
6
7Please also refer to clock-bindings.txt in this directory for common clock
8controller binding usage.
9
10Required properties:
11- compatible: Should be "st,stm32f42xx-rcc"
12- reg: should be register base and length as documented in the
13  datasheet
14- #clock-cells: 2, device nodes should specify the clock in their "clocks"
15  property, containing a phandle to the clock device node, an index selecting
16  between gated clocks and other clocks and an index specifying the clock to
17  use.
18
19Example:
20
21	rcc: rcc@40023800 {
22		#clock-cells = <2>
23		compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
24		reg = <0x40023800 0x400>;
25	};
26
27Specifying gated clocks
28=======================
29
30The primary index must be set to 0.
31
32The secondary index is the bit number within the RCC register bank, starting
33from the first RCC clock enable register (RCC_AHB1ENR, address offset 0x30).
34
35It is calculated as: index = register_offset / 4 * 32 + bit_offset.
36Where bit_offset is the bit offset within the register (LSB is 0, MSB is 31).
37
38Example:
39
40	/* Gated clock, AHB1 bit 0 (GPIOA) */
41	... {
42		clocks = <&rcc 0 0>
43	};
44
45	/* Gated clock, AHB2 bit 4 (CRYP) */
46	... {
47		clocks = <&rcc 0 36>
48	};
49
50Specifying other clocks
51=======================
52
53The primary index must be set to 1.
54
55The secondary index is bound with the following magic numbers:
56
57	0	SYSTICK
58	1	FCLK
59
60Example:
61
62	/* Misc clock, FCLK */
63	... {
64		clocks = <&rcc 1 1>
65	};
66